This patch fixes the kernel EBDA mislocation problem. Thank you, Yinghai.
The change in tables.c protects the legacy x86 BIOS data segment (0x400-0x4ff) from being used for storing coreboot tables. Some bytes from the segment are used by the kernel and should not be garbled. The change in coreboot_table.c is not strictly necessary. It removes some redundancy and confusion. Signed-off-by: Roman Kononov <kononov@dls.net> Acked-by: Marc Jones <marc.jones@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3437 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -402,7 +402,6 @@ unsigned long write_coreboot_table(
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unsigned long low_table_start, unsigned long low_table_end,
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unsigned long rom_table_start, unsigned long rom_table_end)
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{
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unsigned long table_size;
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struct lb_header *head;
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struct lb_memory *mem;
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@ -445,9 +444,8 @@ unsigned long write_coreboot_table(
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low_table_start, low_table_end - low_table_start);
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/* Record the pirq table, acpi tables, and maybe the mptable */
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table_size=rom_table_end-rom_table_start;
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lb_add_memory_range(mem, LB_MEM_TABLE,
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rom_table_start, table_size<0x10000?0x10000:table_size);
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rom_table_start, rom_table_end-rom_table_start);
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/* Note:
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* I assume that there is always memory at immediately after
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@ -72,8 +72,9 @@ struct lb_memory *write_tables(void)
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#if HAVE_MP_TABLE==1
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/* Don't write anything in the traditional x86 BIOS data segment,
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* for example the linux kernel smp need to use 0x467 to pass reset vector
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* or use 0x40e/0x413 for EBDA finding...
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*/
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if(new_low_table_end>0x467){
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if(new_low_table_end>0x400){
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unsigned mptable_size;
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unsigned mpc_start;
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low_table_end += SMP_FLOATING_TABLE_LEN; /* keep the mpf in 1k low, so kernel can find it */
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