soc/amd/common/block/cpu/: Make ucode update more generic
Use the equivalent cpuid in the microcode header to name the update file in cbfs. This allows the SOC to directly locate its microcode file when there are multiple processor revisions. TEST: Loaded a chausie with sabrina, cezanne, and picasso microcode files and booted. Verified that only the sabrina microcode file was successfully loaded Change-Id: I84a2480cf8274d53ffdab7864135c1bf001241e6 Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63589 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -300,6 +300,6 @@ apu/amdfw_b-position := $(AMD_FW_AB_POSITION)
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apu/amdfw_b-type := raw
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apu/amdfw_b-type := raw
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endif
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endif
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cpu_microcode_bins += $(wildcard ${FIRMWARE_LOCATION}/UcodePatch_*.bin)
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amd_microcode_bins += $(wildcard ${FIRMWARE_LOCATION}/UcodePatch_*.bin)
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endif # ($(CONFIG_SOC_AMD_CEZANNE),y)
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endif # ($(CONFIG_SOC_AMD_CEZANNE),y)
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@ -73,7 +73,6 @@ config SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
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config SOC_AMD_COMMON_BLOCK_UCODE
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config SOC_AMD_COMMON_BLOCK_UCODE
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bool
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bool
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select SUPPORT_CPU_UCODE_IN_CBFS
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help
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help
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Builds in support for loading uCode.
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Builds in support for loading uCode.
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@ -1,2 +1,18 @@
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subdirs-y += ./*
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subdirs-y += ./*
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ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE) += update_microcode.c
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ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE) += update_microcode.c
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ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE),y)
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define add-ucode-as-cbfs
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cbfs-files-y += cpu_microcode_$(2).bin
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cpu_microcode_$(2).bin-file := $(1)
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cpu_microcode_$(2).bin-type := microcode
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ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA),y)
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cpu_microcode_$(2).bin-align := 64
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else
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cpu_microcode_$(2).bin-align := 16
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endif
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endef
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$(foreach ucode,$(amd_microcode_bins),$(eval $(call add-ucode-as-cbfs,$(ucode),$(shell hexdump -n 2 -s 0x18 -e '"%x"' $(ucode)))))
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endif
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@ -1,22 +1,18 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <arch/cpu.h>
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#include <arch/cpu.h>
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#include <stdint.h>
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#include <types.h>
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#include <cpu/amd/microcode.h>
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#include <cpu/amd/microcode.h>
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#include <commonlib/helpers.h>
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#include <commonlib/helpers.h>
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#include <console/console.h>
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#include <console/console.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/msr.h>
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#include <cpu/amd/msr.h>
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#include <cpu/amd/msr.h>
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#include <cbfs.h>
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#include <cbfs.h>
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#include <stdio.h>
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#include <timestamp.h>
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#include <timestamp.h>
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#define CPU_MICROCODE_BLOB_NAME "cpu_microcode_blob.bin"
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#define CPU_MICROCODE_BLOB_NAME "cpu_microcode_XXXX.bin"
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#define CPU_MICROCODE_BLOB_FORMAT "cpu_microcode_%04x.bin"
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_Static_assert(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE_SIZE > 0,
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"SOC_AMD_COMMON_BLOCK_UCODE_SIZE is not set");
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#define MPB_MAX_SIZE CONFIG_SOC_AMD_COMMON_BLOCK_UCODE_SIZE
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#define MPB_DATA_OFFSET 32
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struct microcode {
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struct microcode {
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uint32_t date_code;
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uint32_t date_code;
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@ -34,12 +30,8 @@ struct microcode {
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uint8_t chipset2_rev_id;
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uint8_t chipset2_rev_id;
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uint8_t reserved2[4];
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uint8_t reserved2[4];
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uint8_t m_patch_data[MPB_MAX_SIZE-MPB_DATA_OFFSET];
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} __packed;
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} __packed;
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_Static_assert(sizeof(struct microcode) == MPB_MAX_SIZE, "microcode size is invalid");
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static void apply_microcode_patch(const struct microcode *m)
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static void apply_microcode_patch(const struct microcode *m)
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{
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{
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uint32_t new_patch_id;
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uint32_t new_patch_id;
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@ -50,18 +42,17 @@ static void apply_microcode_patch(const struct microcode *m)
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wrmsr(MSR_PATCH_LOADER, msr);
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wrmsr(MSR_PATCH_LOADER, msr);
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printk(BIOS_DEBUG, "microcode: patch id to apply = 0x%08x\n",
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printk(BIOS_DEBUG, "microcode: patch id to apply = 0x%08x\n", m->patch_id);
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m->patch_id);
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msr = rdmsr(IA32_BIOS_SIGN_ID);
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msr = rdmsr(IA32_BIOS_SIGN_ID);
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new_patch_id = msr.lo;
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new_patch_id = msr.lo;
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if (new_patch_id == m->patch_id)
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if (new_patch_id == m->patch_id)
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printk(BIOS_INFO, "microcode: being updated to patch id = 0x%08x succeeded\n",
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printk(BIOS_INFO, "microcode: being updated to patch id = 0x%08x succeeded\n",
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new_patch_id);
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new_patch_id);
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else
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else
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printk(BIOS_ERR, "microcode: being updated to patch id = 0x%08x failed\n",
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printk(BIOS_ERR, "microcode: being updated to patch id = 0x%08x failed\n",
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new_patch_id);
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new_patch_id);
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}
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}
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static uint16_t get_equivalent_processor_rev_id(void)
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static uint16_t get_equivalent_processor_rev_id(void)
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@ -71,15 +62,11 @@ static uint16_t get_equivalent_processor_rev_id(void)
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return (uint16_t)((cpuid_family & 0xff0000) >> 8 | (cpuid_family & 0xff));
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return (uint16_t)((cpuid_family & 0xff0000) >> 8 | (cpuid_family & 0xff));
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}
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}
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static const struct microcode *find_microcode(const struct microcode *ucode, size_t ucode_len)
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static const struct microcode *find_microcode(const struct microcode *ucode,
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uint16_t equivalent_processor_rev_id)
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{
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{
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uint16_t equivalent_processor_rev_id = get_equivalent_processor_rev_id();
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if (ucode->processor_rev_id == equivalent_processor_rev_id)
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const struct microcode *m;
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return ucode;
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for (m = ucode; m < ucode + ucode_len / MPB_MAX_SIZE; m++) {
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if (m->processor_rev_id == equivalent_processor_rev_id)
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return m;
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}
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printk(BIOS_WARNING, "Failed to find microcode for processor rev: %hx.\n",
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printk(BIOS_WARNING, "Failed to find microcode for processor rev: %hx.\n",
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equivalent_processor_rev_id);
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equivalent_processor_rev_id);
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@ -89,39 +76,37 @@ static const struct microcode *find_microcode(const struct microcode *ucode, siz
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void amd_update_microcode_from_cbfs(void)
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void amd_update_microcode_from_cbfs(void)
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{
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{
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static struct microcode ucode_cache;
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static const struct microcode *ucode_cache;
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static bool cache_valid;
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static bool cache_valid;
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struct microcode *ucode_list;
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struct microcode *ucode;
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const struct microcode *matching_ucode;
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char name[] = CPU_MICROCODE_BLOB_NAME;
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size_t ucode_len;
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uint16_t equivalent_processor_rev_id;
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/* Cache the buffer so each CPU doesn't need to read the uCode from flash */
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/* Cache the buffer so each CPU doesn't need to read the uCode from flash */
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/* Note that this code assumes all cores are the same */
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if (!cache_valid) {
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if (!cache_valid) {
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timestamp_add_now(TS_READ_UCODE_START);
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timestamp_add_now(TS_READ_UCODE_START);
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ucode_list = cbfs_map(CPU_MICROCODE_BLOB_NAME, &ucode_len);
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equivalent_processor_rev_id = get_equivalent_processor_rev_id();
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if (!ucode_list) {
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snprintf(name, sizeof(name), CPU_MICROCODE_BLOB_FORMAT, equivalent_processor_rev_id);
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printk(BIOS_WARNING,
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ucode = cbfs_map(name, NULL);
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CPU_MICROCODE_BLOB_NAME " not found. Skipping updates.\n");
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if (!ucode) {
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printk(BIOS_WARNING, "%s not found. Skipping updates.\n", name);
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return;
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return;
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}
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}
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matching_ucode = find_microcode(ucode_list, ucode_len);
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ucode_cache = find_microcode(ucode, equivalent_processor_rev_id);
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if (!matching_ucode) {
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if (!ucode_cache) {
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cbfs_unmap(ucode_list);
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cbfs_unmap(ucode);
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return;
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return;
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}
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}
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ucode_cache = *matching_ucode;
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cache_valid = true;
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cache_valid = true;
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cbfs_unmap(ucode_list);
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timestamp_add_now(TS_READ_UCODE_END);
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timestamp_add_now(TS_READ_UCODE_END);
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}
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}
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apply_microcode_patch(&ucode_cache);
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apply_microcode_patch(ucode_cache);
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}
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}
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void preload_microcode(void)
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void preload_microcode(void)
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@ -129,6 +114,10 @@ void preload_microcode(void)
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if (!CONFIG(CBFS_PRELOAD))
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if (!CONFIG(CBFS_PRELOAD))
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return;
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return;
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printk(BIOS_DEBUG, "Preloading microcode %s\n", CPU_MICROCODE_BLOB_NAME);
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char name[] = CPU_MICROCODE_BLOB_NAME;
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cbfs_preload(CPU_MICROCODE_BLOB_NAME);
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uint16_t equivalent_processor_rev_id = get_equivalent_processor_rev_id();
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snprintf(name, sizeof(name), CPU_MICROCODE_BLOB_FORMAT, equivalent_processor_rev_id);
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printk(BIOS_DEBUG, "Preloading microcode %s\n", name);
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cbfs_preload(name);
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}
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}
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@ -292,6 +292,6 @@ apu/amdfw_b-position := $(AMD_FW_AB_POSITION)
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apu/amdfw_b-type := raw
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apu/amdfw_b-type := raw
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endif
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endif
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cpu_microcode_bins += $(wildcard ${FIRMWARE_LOCATION}/UcodePatch_*.bin)
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amd_microcode_bins := $(wildcard ${FIRMWARE_LOCATION}/UcodePatch_*.bin)
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endif # ($(CONFIG_SOC_AMD_PICASSO),y)
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endif # ($(CONFIG_SOC_AMD_PICASSO),y)
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@ -291,6 +291,6 @@ apu/amdfw_b-position := $(AMD_FW_AB_POSITION)
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apu/amdfw_b-type := raw
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apu/amdfw_b-type := raw
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endif
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endif
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cpu_microcode_bins += $(wildcard ${FIRMWARE_LOCATION}/UcodePatch_*.bin)
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amd_microcode_bins += $(wildcard ${FIRMWARE_LOCATION}/UcodePatch_*.bin)
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endif # ($(CONFIG_SOC_AMD_SABRINA),y)
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endif # ($(CONFIG_SOC_AMD_SABRINA),y)
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