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cpu/x86: Adjust STM smm_save_state_size 

Initial testing of STM support revealed a sizing issue for greater than 4 threads.

This patch reduces the STM smm_save_state_size, which should allow for 24 threads.

Signed-off-by: Eugene D. Myers <edmyers@tycho.nsa.gov>
Change-Id: I025694185469577e072a92ea75cbbb53c24b2c24
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38819
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Eugene Myers 2020-02-10 15:02:27 -05:00 committed by Patrick Georgi
parent 2ae9d69888
commit 970ed2ad29
1 changed files with 1 additions and 13 deletions
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14
src/cpu/x86/mp_init.c
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@ -1046,19 +1046,7 @@ static void fill_mp_state(struct mp_state *state, const struct mp_ops *ops)
*/
if (CONFIG(STM)) {
state->smm_save_state_size +=
sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR);
/* Currently, the CPU SMM save state size is based on a simplistic
* algorithm. (align on 4K)
* note: In the future, this will need to handle newer x86 processors
* that require alignment of the save state on 32K boundaries.
* The alignment is done here because coreboot has a hard coded
* value of 0x400 for this value.
* Also, this alignment only works on CPUs less than 5 threads
*/
if (CONFIG(STM))
state->smm_save_state_size =
ALIGN_UP(state->smm_save_state_size, 0x1000);
ALIGN_UP(sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR), 0x100);
}
/*