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Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6 

Change-Id: I672135a9b6e3b641ceb655cb00d40ee760c17edc
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/268
Tested-by: build bot (Jenkins)
Reviewed-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
Stefan Reinauer 2011-10-13 17:26:43 -07:00 committed by Uwe Hermann
parent 86fc9848ae
commit 971ebd8ee6
2 changed files with 7 additions and 0 deletions
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3
src/southbridge/amd/cimx/sb800/SBPLATFORM.h
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@ -155,4 +155,7 @@ typedef union _PCI_ADDR {
#define cimEhciTrafficHandingDefault FALSE
#define cimFusionMsgCMultiCoreDefault FALSE
#define cimFusionMsgCStageDefault FALSE
#include "vendorcode/amd/cimx/sb800/AMDSBLIB.h"
#endif // _AMD_SBPLATFORM_H_

4
src/vendorcode/amd/cimx/sb800/AMDSBLIB.h
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@ -43,6 +43,8 @@
*
*/
#ifndef __VENDORCODE_AMD_CIMX_SB800_AMDSBLIB_H__
#define __VENDORCODE_AMD_CIMX_SB800_AMDSBLIB_H__
//AMDSBLIB Routines
@ -116,3 +118,5 @@ void WriteIo32(IN unsigned short Address, IN unsigned int Data);
//void CpuidRead(IN unsigned int CpuidFcnAddress, OUT CPUID_DATA *Value);
void CpuidRead(unsigned int CpuidFcnAddress, CPUID_DATA *Value);
unsigned char ReadNumberOfCpuCores(void);
#endif