From 97439ecc0178a0935d50a4b3a1774027ae7bebbf Mon Sep 17 00:00:00 2001 From: Felix Held Date: Mon, 5 Jun 2023 19:30:23 +0200 Subject: [PATCH] soc/intel/xeon_sp: use VGA_MMIO_* defines from arch/vga.h Now that we have x86 architecture specific VGA_MMIO_* defines in arch/vga.h, use those instead of having SoC-specific defines for this. Signed-off-by: Felix Held Change-Id: I77b914d563bdc83e7fad7d7fccd5cf7777cb4918 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75669 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/intel/xeon_sp/cpx/soc_acpi.c | 6 +++--- src/soc/intel/xeon_sp/include/soc/iomap.h | 4 ---- src/soc/intel/xeon_sp/skx/soc_acpi.c | 6 +++--- src/soc/intel/xeon_sp/spr/soc_acpi.c | 6 +++--- src/soc/intel/xeon_sp/uncore.c | 3 ++- 5 files changed, 11 insertions(+), 14 deletions(-) diff --git a/src/soc/intel/xeon_sp/cpx/soc_acpi.c b/src/soc/intel/xeon_sp/cpx/soc_acpi.c index e8abd776d6..52afe45c68 100644 --- a/src/soc/intel/xeon_sp/cpx/soc_acpi.c +++ b/src/soc/intel/xeon_sp/cpx/soc_acpi.c @@ -2,6 +2,7 @@ #include #include +#include #include #include #include @@ -87,9 +88,8 @@ void uncore_inject_dsdt(const struct device *device) /* additional mem32 resources on socket 0 bus 0 */ if (stack == 0) { - acpigen_resource_dword(0, 0xc, 3, 0, VGA_BASE_ADDRESS, - (VGA_BASE_ADDRESS + VGA_BASE_SIZE - 1), 0x0, - VGA_BASE_SIZE); + acpigen_resource_dword(0, 0xc, 3, 0, VGA_MMIO_BASE, + VGA_MMIO_LIMIT, 0x0, VGA_MMIO_SIZE); acpigen_resource_dword(0, 0xc, 1, 0, SPI_BASE_ADDRESS, (SPI_BASE_ADDRESS + SPI_BASE_SIZE - 1), 0x0, SPI_BASE_SIZE); diff --git a/src/soc/intel/xeon_sp/include/soc/iomap.h b/src/soc/intel/xeon_sp/include/soc/iomap.h index 5daf62bf5c..f348ab9330 100644 --- a/src/soc/intel/xeon_sp/include/soc/iomap.h +++ b/src/soc/intel/xeon_sp/include/soc/iomap.h @@ -22,10 +22,6 @@ #define ACPI_BASE_ADDRESS CONFIG_INTEL_ACPI_BASE_ADDRESS #define ACPI_BASE_SIZE 0x100 -/* Video RAM */ -#define VGA_BASE_ADDRESS 0xa0000 -#define VGA_BASE_SIZE 0x20000 - #define HECI1_BASE_ADDRESS 0xfed1a000 #define PCH_PWRM_BASE_ADDRESS CONFIG_INTEL_PCH_PWRM_BASE_ADDRESS diff --git a/src/soc/intel/xeon_sp/skx/soc_acpi.c b/src/soc/intel/xeon_sp/skx/soc_acpi.c index d572d4bde1..eedf38776a 100644 --- a/src/soc/intel/xeon_sp/skx/soc_acpi.c +++ b/src/soc/intel/xeon_sp/skx/soc_acpi.c @@ -2,6 +2,7 @@ #include #include +#include #include #include #include @@ -121,9 +122,8 @@ void uncore_inject_dsdt(const struct device *device) // additional mem32 resources on socket 0 bus 0 if (socket == 0 && stack == 0) { - acpigen_resource_dword(0, 0xc, 3, 0, VGA_BASE_ADDRESS, - (VGA_BASE_ADDRESS + VGA_BASE_SIZE - 1), 0x0, - VGA_BASE_SIZE); + acpigen_resource_dword(0, 0xc, 3, 0, VGA_MMIO_BASE, + VGA_MMIO_LIMIT, 0x0, VGA_MMIO_SIZE); acpigen_resource_dword(0, 0xc, 1, 0, SPI_BASE_ADDRESS, (SPI_BASE_ADDRESS + SPI_BASE_SIZE - 1), 0x0, SPI_BASE_SIZE); diff --git a/src/soc/intel/xeon_sp/spr/soc_acpi.c b/src/soc/intel/xeon_sp/spr/soc_acpi.c index 2b820f123c..933cb97e8d 100644 --- a/src/soc/intel/xeon_sp/spr/soc_acpi.c +++ b/src/soc/intel/xeon_sp/spr/soc_acpi.c @@ -2,6 +2,7 @@ #include #include +#include #include #include #include @@ -131,9 +132,8 @@ static void create_dsdt_iou_pci_resource(uint8_t socket, uint8_t stack, const ST /* Additional Mem32 resources on socket 0 bus 0 */ if (socket == 0 && stack == 0) { - acpigen_resource_dword(0, 0xc, 3, 0, VGA_BASE_ADDRESS, - (VGA_BASE_ADDRESS + VGA_BASE_SIZE - 1), 0x0, - VGA_BASE_SIZE); + acpigen_resource_dword(0, 0xc, 3, 0, VGA_MMIO_BASE, + VGA_MMIO_LIMIT, 0x0, VGA_MMIO_SIZE); acpigen_resource_dword(0, 0xc, 1, 0, SPI_BASE_ADDRESS, (SPI_BASE_ADDRESS + SPI_BASE_SIZE - 1), 0x0, SPI_BASE_SIZE); diff --git a/src/soc/intel/xeon_sp/uncore.c b/src/soc/intel/xeon_sp/uncore.c index 374435946c..66f63d57d8 100644 --- a/src/soc/intel/xeon_sp/uncore.c +++ b/src/soc/intel/xeon_sp/uncore.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ +#include #include #include #include @@ -306,7 +307,7 @@ static void mc_add_dram_resources(struct device *dev, int *res_count) * 0xa0000 - 0xbffff: legacy VGA * 0xc0000 - 0xfffff: RAM */ - res = mmio_range(dev, index++, VGA_BASE_ADDRESS, VGA_BASE_SIZE); + res = mmio_range(dev, index++, VGA_MMIO_BASE, VGA_MMIO_SIZE); LOG_RESOURCE("legacy_mmio", dev, res); res = reserved_ram_from_to(dev, index++, 0xc0000, 1 * MiB);