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mb/google/brya/vell: Move WWAN devices for vell 

This was to merge PCIe ACPI code to WWAN device. Also, RTD3 devices are
add to overridetree.cb where WWAN is present for vell.

BUG=none
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot

Signed-off-by: Robert Chen <robert.chen@quanta.corp-partner.google.com>
Change-Id: If27abcf31ed948899bfaecbe8ef494fe8a80609b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Robert Chen 2022-03-14 11:17:01 +08:00 committed by Felix Held
parent d9beb7bc50
commit 977282f6ce
1 changed files with 25 additions and 0 deletions
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25
src/mainboard/google/brya/variants/vell/overridetree.cb
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@ -155,6 +155,31 @@ chip soc/intel/alderlake
device generic 0 on end
end
end
device ref pcie_rp6 on
# Enable WWAN PCIE 6 using clk 5
register "pch_pcie_rp[PCH_RP(6)]" = "{
.clk_src = 5,
.clk_req = 5,
.flags = PCIE_RP_LTR | PCIE_RP_AER,
}"
chip soc/intel/common/block/pcie/rtd3
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)"
register "reset_off_delay_ms" = "20"
register "srcclk_pin" = "5"
register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL"
register "skip_on_off_support" = "true"
device generic 0 alias rp6_rtd3 on end
end
chip drivers/wwan/fm
register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F21)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E16)"
register "perst_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)"
register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A7)"
register "add_acpi_dma_property" = "true"
use rp6_rtd3 as rtd3dev
device generic 0 on end
end
end
device ref pcie_rp8 off end
device ref pcie_rp9 off end
device ref tcss_dma0 on