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src/soc/qualcomm: Remove unnecessary space after casts 

Change-Id: Ic6c711fe3fad19c24ca4c01f8d0a4bc002f14bd6
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69807
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Elyes Haouas 2022-11-18 15:08:13 +01:00 committed by Felix Held
parent 334772008c
commit 977673894f
10 changed files with 37 additions and 37 deletions
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2
src/soc/qualcomm/common/include/soc/qspi_common.h
View File

@ -30,7 +30,7 @@ struct qcom_qspi_regs {
};
check_member(qcom_qspi_regs, rd_fifo, 0x50);
static struct qcom_qspi_regs * const qcom_qspi = (void *) QSPI_BASE;
static struct qcom_qspi_regs * const qcom_qspi = (void *)QSPI_BASE;
// MSTR_CONFIG register

24
src/soc/qualcomm/common/qspi.c
View File

@ -66,7 +66,7 @@ static void dma_transfer_chain(struct cmd_desc *chain)
uint32_t mstr_int_status;
write32(&qcom_qspi->mstr_int_sts, 0xFFFFFFFF);
write32(&qcom_qspi->next_dma_desc_addr, (uint32_t)(uintptr_t) chain);
write32(&qcom_qspi->next_dma_desc_addr, (uint32_t)(uintptr_t)chain);
while (1) {
mstr_int_status = read32(&qcom_qspi->mstr_int_sts);
@ -87,15 +87,15 @@ static void flush_chain(void)
if (desc->direction == MASTER_READ) {
if (desc->bounce_length == 0)
dcache_invalidate_by_mva(
(void *)(uintptr_t) desc->data_address,
(void *)(uintptr_t)desc->data_address,
desc->length);
else {
src = (void *)(uintptr_t) desc->bounce_src;
dst = (void *)(uintptr_t) desc->bounce_dst;
src = (void *)(uintptr_t)desc->bounce_src;
dst = (void *)(uintptr_t)desc->bounce_dst;
memcpy(dst, src, desc->bounce_length);
}
}
desc = (void *)(uintptr_t) desc->next_descriptor;
desc = (void *)(uintptr_t)desc->next_descriptor;
}
curr_desc_idx = -1;
}
@ -112,7 +112,7 @@ static struct cmd_desc *allocate_descriptor(void)
index = ++curr_desc_idx;
next = &dma->descriptors[index];
next->data_address = (uint32_t) (uintptr_t) dma->buffers[index];
next->data_address = (uint32_t)(uintptr_t)dma->buffers[index];
next->next_descriptor = 0;
next->direction = MASTER_READ;
@ -131,7 +131,7 @@ static struct cmd_desc *allocate_descriptor(void)
next->bounce_length = 0;
if (current)
current->next_descriptor = (uint32_t)(uintptr_t) next;
current->next_descriptor = (uint32_t)(uintptr_t)next;
return next;
}
@ -164,13 +164,13 @@ static void queue_bounce_data(uint8_t *data, uint32_t data_bytes,
desc = allocate_descriptor();
desc->direction = write;
desc->multi_io_mode = data_mode;
ptr = (void *)(uintptr_t) desc->data_address;
ptr = (void *)(uintptr_t)desc->data_address;
if (write) {
memcpy(ptr, data, data_bytes);
} else {
desc->bounce_src = (uint32_t)(uintptr_t) ptr;
desc->bounce_dst = (uint32_t)(uintptr_t) data;
desc->bounce_src = (uint32_t)(uintptr_t)ptr;
desc->bounce_dst = (uint32_t)(uintptr_t)data;
desc->bounce_length = data_bytes;
}
@ -185,7 +185,7 @@ static void queue_direct_data(uint8_t *data, uint32_t data_bytes,
desc = allocate_descriptor();
desc->direction = write;
desc->multi_io_mode = data_mode;
desc->data_address = (uint32_t)(uintptr_t) data;
desc->data_address = (uint32_t)(uintptr_t)data;
desc->length = data_bytes;
if (write)
@ -291,7 +291,7 @@ static int xfer(enum qspi_mode mode, const void *dout, size_t out_bytes,
return -1;
}
queue_data((uint8_t *) (out_bytes ? dout : din),
queue_data((uint8_t *)(out_bytes ? dout : din),
in_bytes | out_bytes, mode, !!out_bytes);
flush_chain();

4
src/soc/qualcomm/common/qupv3_config.c
View File

@ -188,7 +188,7 @@ void gpi_firmware_load(int addr)
struct gsi_fw_hdr *gsi_hdr;
struct gsi_fw_iep *fwIep;
struct gsi_fw_iram *fwIRam;
struct gsi_regs *regs = (struct gsi_regs *)(uintptr_t) addr;
struct gsi_regs *regs = (struct gsi_regs *)(uintptr_t)addr;
static const char * const filename = "fallback/gsi_fw";
/* Assign firmware header base */
@ -241,7 +241,7 @@ static void qup_common_init(int addr)
{
struct qupv3_common_reg *qupv3_common;
/* HPG section 3.1.2 */
qupv3_common = (struct qupv3_common_reg *)(uintptr_t) addr;
qupv3_common = (struct qupv3_common_reg *)(uintptr_t)addr;
setbits32(&qupv3_common->qupv3_common_cfg_reg,
QUPV3_COMMON_CFG_FAST_SWITCH_TO_HIGH_DISABLE_BMSK);

2
src/soc/qualcomm/common/usb/qusb_phy.c
View File

@ -96,7 +96,7 @@ void hs_usb_phy_init(void *board_data)
hs_phy_reg = &qusb_phy;
hs_phy_reg->board_data = (struct usb_board_data *) board_data;
hs_phy_reg->board_data = (struct usb_board_data *)board_data;
/* PWR_CTRL: set the power down bit to disable the PHY */

2
src/soc/qualcomm/common/usb/snps_usb_phy.c
View File

@ -36,7 +36,7 @@ struct hs_usb_phy_reg *hs_phy_reg = (void *)HS_USB_PRIM_PHY_BASE;
void hs_usb_phy_init(void *board_data)
{
struct usb_board_data *override_data =
(struct usb_board_data *) board_data;
(struct usb_board_data *)board_data;
clrsetbits32(&hs_phy_reg->cfg0, UTMI_PHY_CMN_CTRL_OVERRIDE_EN,
UTMI_PHY_CMN_CTRL_OVERRIDE_EN);

2
src/soc/qualcomm/ipq40xx/blobs_init.c
View File

@ -31,7 +31,7 @@ static void *load_ipq_blob(const char *file_name)
(blob_mbn->mbn_total_size > blob_size))
return NULL;
blob_dest = (void *) blob_mbn->mbn_destination;
blob_dest = (void *)blob_mbn->mbn_destination;
if (blob_mbn->mbn_destination) {
/* Copy the blob to the appropriate memory location. */

2
src/soc/qualcomm/ipq40xx/spi.c
View File

@ -591,7 +591,7 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
write_force_cs(slave, 1);
if (dout != NULL) {
ret = blsp_spi_write(ds, txp, (unsigned int) out_bytes);
ret = blsp_spi_write(ds, txp, (unsigned int)out_bytes);
if (ret != SUCCESS)
goto out;
}

4
src/soc/qualcomm/ipq806x/blobs_init.c
View File

@ -27,7 +27,7 @@ static void *load_ipq_blob(const char *file_name)
(blob_mbn->mbn_total_size > blob_size))
return NULL;
blob_dest = (void *) blob_mbn->mbn_destination;
blob_dest = (void *)blob_mbn->mbn_destination;
if (blob_mbn->mbn_destination) {
/* Copy the blob to the appropriate memory location. */
memcpy(blob_dest, blob_mbn + 1, blob_mbn->mbn_total_size);
@ -99,7 +99,7 @@ void start_rpm(void)
return;
}
load_addr = (u32) load_ipq_blob("rpm.mbn");
load_addr = (u32)load_ipq_blob("rpm.mbn");
if (!load_addr)
die("could not find or map RPM code\n");

2
src/soc/qualcomm/qcs405/spi.c
View File

@ -660,7 +660,7 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
return ret;
if (dout != NULL) {
ret = blsp_spi_write(ds, txp, (unsigned int) out_bytes);
ret = blsp_spi_write(ds, txp, (unsigned int)out_bytes);
if (ret != SUCCESS)
goto out;
}

30
src/soc/qualcomm/sc7280/pcie.c
View File

@ -140,13 +140,13 @@ static const struct qcom_qmp_phy_init_tbl sc7280_qmp_gen3x2_pcie_misc_tbl[] = {
};
static pcie_cntlr_cfg_t pcie_host = {
.parf = (void *) PCIE1_PCIE_PARF,
.dbi_base = (void *) PCIE1_GEN3X2_PCIE_DBI,
.elbi = (void *) PCIE1_GEN3X2_PCIE_ELBI,
.atu_base = (void *) PCIE1_GEN3X2_DWC_PCIE_DM_IATU,
.cfg_base = (void *) PCIE1_GEN3X2_PCIE_DBI + PCIE_EP_CONF_OFFSET,
.pcie_bcr = (void *) PCIE1_BCR,
.qmp_phy_bcr = (void *) GCC_PCIE_1_PHY_BCR,
.parf = (void *)PCIE1_PCIE_PARF,
.dbi_base = (void *)PCIE1_GEN3X2_PCIE_DBI,
.elbi = (void *)PCIE1_GEN3X2_PCIE_ELBI,
.atu_base = (void *)PCIE1_GEN3X2_DWC_PCIE_DM_IATU,
.cfg_base = (void *)PCIE1_GEN3X2_PCIE_DBI + PCIE_EP_CONF_OFFSET,
.pcie_bcr = (void *)PCIE1_BCR,
.qmp_phy_bcr = (void *)GCC_PCIE_1_PHY_BCR,
.lanes = PCIE_3x2_NUM_LANES,
.cfg_size = PCIE_EP_CONF_SIZE,
.perst = GPIO(2),
@ -160,14 +160,14 @@ static pcie_cntlr_cfg_t pcie_host = {
};
static pcie_qmp_phy_cfg_t pcie1_qmp_phy_3x2 = {
.qmp_phy_base = (void *) PCIE_1_QMP_PHY,
.serdes = (void *) PCE1_QPHY_SERDES,
.tx0 = (void *) PCE1_QPHY_TX0,
.rx0 = (void *) PCE1_QPHY_RX0,
.pcs = (void *) PCIE1_QMP_PHY_PCS_COM,
.tx1 = (void *) PCE1_QPHY_TX1,
.rx1 = (void *) PCE1_QPHY_RX1,
.pcs_misc = (void *) PCE1_QPHY_PCS_MISC,
.qmp_phy_base = (void *)PCIE_1_QMP_PHY,
.serdes = (void *)PCE1_QPHY_SERDES,
.tx0 = (void *)PCE1_QPHY_TX0,
.rx0 = (void *)PCE1_QPHY_RX0,
.pcs = (void *)PCIE1_QMP_PHY_PCS_COM,
.tx1 = (void *)PCE1_QPHY_TX1,
.rx1 = (void *)PCE1_QPHY_RX1,
.pcs_misc = (void *)PCE1_QPHY_PCS_MISC,
.serdes_tbl = sc7280_qmp_pcie_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(sc7280_qmp_pcie_serdes_tbl),
.tx_tbl = sc7280_qmp_pcie_tx_tbl,