device/dram/ddr2.c: Add methods to compute to identify dram
DDR2 DIMMs are uniquely defined by SPD byte 64 till 72 and 93 till 98. Compute a crc16 over that data to provide a solid way to check DIMM identify. Reuse the crc16 function from ddr3.c to do this. Change-Id: I3c0c42786197f9b4eb3e42261c10ff5e4266120f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23345 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -71,6 +71,30 @@ u8 spd_ddr2_calc_checksum(u8 *spd, int len)
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return c;
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return c;
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}
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}
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/**
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* \brief Calculate the CRC of a DDR2 SPD unique identifier
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*
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* @param spd pointer to raw SPD data
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* @param len length of data in SPD
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*
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* @return the CRC of SPD data bytes 64..72 and 93..98, or 0
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* when spd data is truncated.
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*/
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u16 spd_ddr2_calc_unique_crc(const u8 *spd, int len)
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{
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u8 id_bytes[15];
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int i, j = 0;
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if (len < 98)
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/* Not enough bytes available to get the CRC */
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return 0;
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for (i = 64; i <= 72; i++)
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id_bytes[j++] = spd[i];
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for (i = 93; i <= 98; i++)
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id_bytes[j++] = spd[i];
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return ddr3_crc16(id_bytes, 15);
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}
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/**
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/**
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* \brief Return size of SPD.
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* \brief Return size of SPD.
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*
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*
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@ -46,7 +46,7 @@ int spd_dimm_is_registered_ddr3(enum spd_dimm_type type)
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return 0;
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return 0;
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}
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}
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static u16 crc16(const u8 *ptr, int n_crc)
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u16 ddr3_crc16(const u8 *ptr, int n_crc)
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{
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{
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int i;
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int i;
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u16 crc = 0;
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u16 crc = 0;
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@ -87,7 +87,7 @@ u16 spd_ddr3_calc_crc(u8 *spd, int len)
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/* Not enough bytes available to get the CRC */
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/* Not enough bytes available to get the CRC */
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return 0;
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return 0;
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return crc16(spd, n_crc);
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return ddr3_crc16(spd, n_crc);
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}
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}
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/**
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/**
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@ -104,7 +104,7 @@ u16 spd_ddr3_calc_unique_crc(u8 *spd, int len)
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/* Not enough bytes available to get the CRC */
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/* Not enough bytes available to get the CRC */
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return 0;
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return 0;
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return crc16(&spd[117], 11);
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return ddr3_crc16(&spd[117], 11);
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}
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}
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/**
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/**
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@ -67,4 +67,6 @@ enum spd_status {
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SPD_STATUS_INVALID_FIELD,
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SPD_STATUS_INVALID_FIELD,
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};
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};
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u16 ddr3_crc16(const u8 *ptr, int n_crc);
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#endif /* DEVICE_DRAM_COMMON_H */
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#endif /* DEVICE_DRAM_COMMON_H */
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@ -179,5 +179,6 @@ int spd_decode_ddr2(struct dimm_attr_ddr2_st *dimm, u8 spd[SPD_SIZE_MAX_DDR2]);
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void dram_print_spd_ddr2(const struct dimm_attr_ddr2_st *dimm);
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void dram_print_spd_ddr2(const struct dimm_attr_ddr2_st *dimm);
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void normalize_tck(u32 *tclk);
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void normalize_tck(u32 *tclk);
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u8 spd_get_msbs(u8 c);
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u8 spd_get_msbs(u8 c);
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u16 spd_ddr2_calc_unique_crc(const u8 *spd, int len);
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#endif /* DEVICE_DRAM_DDR2L_H */
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#endif /* DEVICE_DRAM_DDR2L_H */
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