mediatek/mt8183: Remove DRAM_DMA section
DRAM_DMA section is used for the special SPI NOR controller on legacy SOC. Remove it since no driver need it currently and we don't have the special SPI NOR controller on mt8183. BUG=b:80501386 BRANCH=none TEST=Boots fine on Kukui Change-Id: I6ba0757adbf4f1f8d2688e5ab1a36007e4e0d0fd Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27113 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
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@ -25,11 +25,6 @@
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#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr)
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#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr)
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#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr)
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#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr)
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#define DRAM_DMA(addr, size) \
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REGION(dram_dma, addr, size, 4K) \
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_ = ASSERT(size % 4K == 0, \
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"DRAM DMA buffer should be multiple of smallest page size (4K)!");
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SECTIONS
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SECTIONS
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{
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{
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SRAM_START(0x00100000)
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SRAM_START(0x00100000)
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@ -50,7 +45,6 @@ SECTIONS
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SRAM_L2C_END(0x00280000)
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SRAM_L2C_END(0x00280000)
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DRAM_START(0x40000000)
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DRAM_START(0x40000000)
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DRAM_DMA(0x40000000, 1M)
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POSTRAM_CBFS_CACHE(0x40000000, 2M)
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POSTRAM_CBFS_CACHE(0x40100000, 1M)
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RAMSTAGE(0x40200000, 256K)
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RAMSTAGE(0x40200000, 256K)
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}
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}
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