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We hardcode highmemory size in every northbridge! This is bad, and especially if suspend to ram is involved. Let the default be taken from cbmem.h which also handles the suspend logic. 

Abuild tested. Please check all changes if I did not make any wrong while converting this to bytes.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz> 
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6171 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Rudolf Marek 2010-12-13 19:50:25 +00:00
parent 29c7dfcadc
commit 97be27ebba
23 changed files with 89 additions and 111 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
src/include/cbmem.h
View File

@ -21,13 +21,14 @@
#define _CBMEM_H_
/* Reserve 64k for ACPI and other tables */
#define HIGH_MEMORY_TABLES ( 64 * 1024 )
#define HIGH_MEMORY_DEF_SIZE ( 64 * 1024 )
extern uint64_t high_tables_base, high_tables_size;
#if CONFIG_HAVE_ACPI_RESUME
#define HIGH_MEMORY_SIZE ((CONFIG_RAMTOP - CONFIG_RAMBASE) + HIGH_MEMORY_TABLES)
#define HIGH_MEMORY_SAVE ( HIGH_MEMORY_SIZE - HIGH_MEMORY_TABLES )
#define HIGH_MEMORY_SIZE ((CONFIG_RAMTOP - CONFIG_RAMBASE) + HIGH_MEMORY_DEF_SIZE)
#define HIGH_MEMORY_SAVE ( HIGH_MEMORY_SIZE - HIGH_MEMORY_DEF_SIZE )
#else
#define HIGH_MEMORY_SIZE HIGH_MEMORY_TABLES
#define HIGH_MEMORY_SIZE HIGH_MEMORY_DEF_SIZE
#endif
#define CBMEM_ID_FREESPACE 0x46524545

1
src/lib/cbmem.c
View File

@ -193,7 +193,6 @@ void *cbmem_find(u32 id)
#if CONFIG_HAVE_ACPI_RESUME
extern u8 acpi_slp_type;
#endif
extern uint64_t high_tables_base, high_tables_size;
void cbmem_initialize(void)
{

7
src/mainboard/emulation/qemu-x86/northbridge.c
View File

@ -11,8 +11,7 @@
#include <delay.h>
#if CONFIG_WRITE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
#define CMOS_ADDR_PORT 0x70
@ -49,8 +48,8 @@ static void cpu_pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
#endif
assign_resources(dev->link_list);

19
src/northbridge/amd/amdfam10/northbridge.c
View File

@ -841,8 +841,7 @@ static void disable_hoist_memory(unsigned long hole_startk, int node_id)
#endif
#if CONFIG_WRITE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
#if CONFIG_GFXUMA == 1
@ -1033,13 +1032,13 @@ static void amdfam10_domain_set_resources(device_t dev)
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA == 1
high_tables_base = uma_memory_base - (HIGH_TABLES_SIZE * 1024);
high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
#else
high_tables_base = (mmio_basek - HIGH_TABLES_SIZE) * 1024;
high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE;
#endif
high_tables_size = HIGH_TABLES_SIZE * 1024;
printk(BIOS_DEBUG, " split: %dK table at =%08llx\n", HIGH_TABLES_SIZE,
high_tables_base);
high_tables_size = HIGH_MEMORY_SIZE;
printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
HIGH_MEMORY_SIZE / 1024, high_tables_base);
}
#endif
}
@ -1078,11 +1077,11 @@ static void amdfam10_domain_set_resources(device_t dev)
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA == 1
high_tables_base = uma_memory_base - (HIGH_TABLES_SIZE * 1024);
high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
#else
high_tables_base = (limitk - HIGH_TABLES_SIZE) * 1024;
high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE;
#endif
high_tables_size = HIGH_TABLES_SIZE * 1024;
high_tables_size = HIGH_MEMORY_SIZE;
}
#endif
}

18
src/northbridge/amd/amdk8/northbridge.c
View File

@ -820,8 +820,6 @@ static u32 hoist_memory(unsigned long hole_startk, int node_id)
#if CONFIG_WRITE_HIGH_TABLES==1
#include <cbmem.h>
#define HIGH_TABLES_SIZE ((HIGH_MEMORY_SIZE + 1024) / 1024)
extern uint64_t high_tables_base, high_tables_size;
#endif
#if CONFIG_GFXUMA == 1
@ -1020,13 +1018,13 @@ static void amdk8_domain_set_resources(device_t dev)
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA == 1
high_tables_base = uma_memory_base - (HIGH_TABLES_SIZE * 1024);
high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
#else
high_tables_base = (mmio_basek - HIGH_TABLES_SIZE) * 1024;
high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE;
#endif
high_tables_size = HIGH_TABLES_SIZE * 1024;
printk(BIOS_DEBUG, " split: %dK table at =%08llx\n", HIGH_TABLES_SIZE,
high_tables_base);
high_tables_size = HIGH_MEMORY_SIZE;
printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
HIGH_MEMORY_SIZE / 1024, high_tables_base);
}
#endif
}
@ -1065,11 +1063,11 @@ static void amdk8_domain_set_resources(device_t dev)
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA == 1
high_tables_base = uma_memory_base - (HIGH_TABLES_SIZE * 1024);
high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
#else
high_tables_base = (limitk - HIGH_TABLES_SIZE) * 1024;
high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE;
#endif
high_tables_size = HIGH_TABLES_SIZE * 1024;
high_tables_size = HIGH_MEMORY_SIZE;
}
#endif
}

7
src/northbridge/amd/gx1/northbridge.c
View File

@ -67,8 +67,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@ -116,8 +115,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
#endif
/* Report the memory regions */

7
src/northbridge/amd/gx2/northbridge.c
View File

@ -432,8 +432,7 @@ static struct device_operations cpu_bus_ops = {
void chipsetInit (void);
#if CONFIG_WRITE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void enable_dev(struct device *dev)
@ -457,8 +456,8 @@ static void enable_dev(struct device *dev)
tomk = ((sizeram() - VIDEO_MB) * 1024) - SMM_SIZE;
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
#endif
ram_resource(dev, 0, 0, tomk);
} else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {

7
src/northbridge/amd/lx/northbridge.c
View File

@ -373,8 +373,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@ -396,8 +395,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
#endif
}

7
src/northbridge/intel/e7501/northbridge.c
View File

@ -10,8 +10,7 @@
#include "chip.h"
#if CONFIG_WRITE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@ -92,8 +91,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
#endif
}
assign_resources(dev->link_list);

7
src/northbridge/intel/e7520/northbridge.c
View File

@ -17,8 +17,7 @@
static unsigned int max_bus;
#if CONFIG_WRITE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@ -111,8 +110,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
#endif
}
assign_resources(dev->link_list);

7
src/northbridge/intel/e7525/northbridge.c
View File

@ -17,8 +17,7 @@
static unsigned int max_bus;
#if CONFIG_WRITE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@ -111,8 +110,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
#endif
}
assign_resources(dev->link_list);

7
src/northbridge/intel/i3100/northbridge.c
View File

@ -38,8 +38,7 @@
static u32 max_bus;
#if CONFIG_WRITE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@ -132,8 +131,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
#endif
}
assign_resources(dev->link_list);

7
src/northbridge/intel/i440bx/northbridge.c
View File

@ -34,8 +34,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void i440bx_domain_set_resources(device_t dev)
@ -75,8 +74,8 @@ static void i440bx_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
#endif
}
assign_resources(dev->link_list);

7
src/northbridge/intel/i440lx/northbridge.c
View File

@ -63,8 +63,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void i440lx_domain_set_resources(device_t dev)
@ -104,8 +103,8 @@ static void i440lx_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
#endif
}
assign_resources(dev->link_list);

7
src/northbridge/intel/i82810/northbridge.c
View File

@ -84,8 +84,7 @@ static int translate_i82810_to_mb[] = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@ -150,8 +149,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
#endif
assign_resources(dev->link_list);
}

7
src/northbridge/intel/i82830/northbridge.c
View File

@ -65,8 +65,7 @@ int add_northbridge_resources(struct lb_memory *mem)
}
#if CONFIG_WRITE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
{
@ -119,8 +118,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
#endif
}

7
src/northbridge/intel/i855/northbridge.c
View File

@ -54,8 +54,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
{
@ -112,8 +111,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
#endif
}
assign_resources(dev->link_list);

7
src/northbridge/intel/i945/northbridge.c
View File

@ -93,8 +93,7 @@ static void add_fixed_resources(struct device *dev, int index)
}
#if CONFIG_WRITE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 1024 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@ -183,8 +182,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
#endif
}

11
src/northbridge/via/cn400/northbridge.c
View File

@ -178,9 +178,7 @@ static void ram_reservation(device_t dev, unsigned long index,
#endif
#if CONFIG_WRITE_HIGH_TABLES==1
/* maximum size of high tables in KB */
#define HIGH_TABLES_SIZE 64
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void cn400_domain_set_resources(device_t dev)
@ -211,9 +209,10 @@ static void cn400_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES == 1
/* Locate the High Tables at the Top of Low Memory below the Video RAM */
high_tables_base = (uint64_t) (tolmk - (CONFIG_VIDEO_MB *1024) - HIGH_TABLES_SIZE) * 1024;
high_tables_size = (uint64_t) HIGH_TABLES_SIZE* 1024;
printk(BIOS_SPEW, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
high_tables_base = ((tolmk - (CONFIG_VIDEO_MB *1024)) * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
printk(BIOS_SPEW, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n",
tomk*1024, high_tables_base, high_tables_size);
#endif
/* Report the memory regions. */

11
src/northbridge/via/cn700/northbridge.c
View File

@ -98,9 +98,7 @@ static const struct pci_driver memctrl_driver __pci_driver = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
/* maximum size of high tables in KB */
#define HIGH_TABLES_SIZE 64
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@ -141,9 +139,10 @@ static void pci_domain_set_resources(device_t dev)
}
#if CONFIG_WRITE_HIGH_TABLES == 1
high_tables_base = (tolmk - CONFIG_VIDEO_MB * 1024 - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
high_tables_base = ((tolmk - CONFIG_VIDEO_MB * 1024) * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n",
tomk*1024, high_tables_base, high_tables_size);
#endif
/* Report the memory regions. */

11
src/northbridge/via/cx700/northbridge.c
View File

@ -33,9 +33,7 @@
#include "northbridge.h"
#if CONFIG_WRITE_HIGH_TABLES==1
/* maximum size of high tables in KB */
#define HIGH_TABLES_SIZE 64
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@ -77,9 +75,10 @@ static void pci_domain_set_resources(device_t dev)
}
#if CONFIG_WRITE_HIGH_TABLES == 1
high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE* 1024;
printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n",
tomk*1024, high_tables_base, high_tables_size);
#endif
/* Report the memory regions */

11
src/northbridge/via/vt8601/northbridge.c
View File

@ -46,9 +46,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
/* maximum size of high tables in KB */
#define HIGH_TABLES_SIZE 64
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@ -92,9 +90,10 @@ static void pci_domain_set_resources(device_t dev)
}
#if CONFIG_WRITE_HIGH_TABLES == 1
high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE* 1024;
printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n",
tomk*1024, high_tables_base, high_tables_size);
#endif
/* Report the memory regions */

11
src/northbridge/via/vt8623/northbridge.c
View File

@ -106,9 +106,7 @@ static const struct pci_driver agp_driver __pci_driver = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
/* maximum size of high tables in KB */
#define HIGH_TABLES_SIZE 64
extern uint64_t high_tables_base, high_tables_size;
#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@ -152,9 +150,10 @@ static void pci_domain_set_resources(device_t dev)
}
#if CONFIG_WRITE_HIGH_TABLES == 1
high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE* 1024;
printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n",
tomk*1024, high_tables_base, high_tables_size);
#endif
/* Report the memory regions */