soc: select generic gpio lib on (almost) all non-x86 SOCs
BOARD_ID functionality is not what requires the GPIO lib, but it is the mainboard specific implementations that do. The option essentially says whether the SoC provides <soc/gpio.h> (with the interface required by the common GPIO code). Right now, x86 and Samsung's Exynos SOCs don't have support for this interface. So this should be selected by the SOC, not by BOARD_ID_SUPPORT. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> BUG=none BRANCH=none TEST=emerge-storm coreboot still successfully compiled an image Change-Id: I0ce2bd7ce023f22791d31a6245833b61135504b3 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 0dd4dea521372194eedf11b077d95fd3b15ad9f7 Original-Change-Id: I3dea6c2fb42a23fcb9d384c3bbfa7fc8e217be2d Original-Reviewed-on: https://chromium-review.googlesource.com/262743 Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Original-Tested-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/9899 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -34,6 +34,7 @@ config SOC_BROADCOM_CYGNUS
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select HAVE_UART_SPECIAL
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select HAS_PRECBMEM_TIMESTAMP_REGION
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select RETURN_FROM_VERSTAGE
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select GENERIC_GPIO_LIB
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if SOC_BROADCOM_CYGNUS
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@ -27,6 +27,7 @@ config CPU_IMGTEC_PISTACHIO
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select HAVE_UART_MEMORY_MAPPED
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select HAVE_UART_SPECIAL
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select SPI_ATOMIC_SEQUENCING
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select GENERIC_GPIO_LIB
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bool
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if CPU_IMGTEC_PISTACHIO
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@ -30,6 +30,7 @@ config SOC_MARVELL_BG4CD
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select EARLY_CONSOLE
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select GENERIC_UDELAY
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select HAVE_MONOTONIC_TIMER
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select GENERIC_GPIO_LIB
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if SOC_MARVELL_BG4CD
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@ -12,7 +12,7 @@ config SOC_NVIDIA_TEGRA124
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select BOOTBLOCK_CONSOLE
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select ARM_BOOTBLOCK_CUSTOM
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select ARM_LPAE
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select GENERIC_GPIO_LIB
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if SOC_NVIDIA_TEGRA124
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@ -17,6 +17,7 @@ config SOC_NVIDIA_TEGRA132
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select DYNAMIC_CBMEM
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select SMP
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select ARCH_USE_SECURE_MONITOR
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select GENERIC_GPIO_LIB
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if SOC_NVIDIA_TEGRA132
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@ -10,6 +10,7 @@ config SOC_QC_IPQ806X
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select DYNAMIC_CBMEM
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select HAVE_UART_SPECIAL
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select SPI_ATOMIC_SEQUENCING
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select GENERIC_GPIO_LIB
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if SOC_QC_IPQ806X
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@ -31,6 +31,7 @@ config SOC_ROCKCHIP_RK3288
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select HAVE_UART_SPECIAL
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select BOOTBLOCK_CONSOLE
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select UNCOMPRESSED_RAMSTAGE
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select GENERIC_GPIO_LIB
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if SOC_ROCKCHIP_RK3288
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