soc: select generic gpio lib on (almost) all non-x86 SOCs

BOARD_ID functionality is not what requires the GPIO lib,
but it is the mainboard specific implementations that do.
The option essentially says whether the SoC provides
<soc/gpio.h> (with the interface required by the common
GPIO code). Right now, x86 and Samsung's Exynos SOCs
don't have support for this interface.

So this should be selected by the SOC, not by
BOARD_ID_SUPPORT.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>

BUG=none
BRANCH=none
TEST=emerge-storm coreboot still successfully compiled an image

Change-Id: I0ce2bd7ce023f22791d31a6245833b61135504b3
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0dd4dea521372194eedf11b077d95fd3b15ad9f7
Original-Change-Id: I3dea6c2fb42a23fcb9d384c3bbfa7fc8e217be2d
Original-Reviewed-on: https://chromium-review.googlesource.com/262743
Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Tested-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/9899
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Stefan Reinauer 2015-03-26 15:58:41 -07:00 committed by Patrick Georgi
parent 55aa17b744
commit 97db1fb47f
7 changed files with 7 additions and 1 deletions

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@ -34,6 +34,7 @@ config SOC_BROADCOM_CYGNUS
select HAVE_UART_SPECIAL
select HAS_PRECBMEM_TIMESTAMP_REGION
select RETURN_FROM_VERSTAGE
select GENERIC_GPIO_LIB
if SOC_BROADCOM_CYGNUS

View File

@ -27,6 +27,7 @@ config CPU_IMGTEC_PISTACHIO
select HAVE_UART_MEMORY_MAPPED
select HAVE_UART_SPECIAL
select SPI_ATOMIC_SEQUENCING
select GENERIC_GPIO_LIB
bool
if CPU_IMGTEC_PISTACHIO

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@ -30,6 +30,7 @@ config SOC_MARVELL_BG4CD
select EARLY_CONSOLE
select GENERIC_UDELAY
select HAVE_MONOTONIC_TIMER
select GENERIC_GPIO_LIB
if SOC_MARVELL_BG4CD

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@ -12,7 +12,7 @@ config SOC_NVIDIA_TEGRA124
select BOOTBLOCK_CONSOLE
select ARM_BOOTBLOCK_CUSTOM
select ARM_LPAE
select GENERIC_GPIO_LIB
if SOC_NVIDIA_TEGRA124

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@ -17,6 +17,7 @@ config SOC_NVIDIA_TEGRA132
select DYNAMIC_CBMEM
select SMP
select ARCH_USE_SECURE_MONITOR
select GENERIC_GPIO_LIB
if SOC_NVIDIA_TEGRA132

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@ -10,6 +10,7 @@ config SOC_QC_IPQ806X
select DYNAMIC_CBMEM
select HAVE_UART_SPECIAL
select SPI_ATOMIC_SEQUENCING
select GENERIC_GPIO_LIB
if SOC_QC_IPQ806X

View File

@ -31,6 +31,7 @@ config SOC_ROCKCHIP_RK3288
select HAVE_UART_SPECIAL
select BOOTBLOCK_CONSOLE
select UNCOMPRESSED_RAMSTAGE
select GENERIC_GPIO_LIB
if SOC_ROCKCHIP_RK3288