GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd/*/uart: commonize UART code and MMIO device driver 

Now that the SoC-specific UART controller data and the common code part
are cleanly separated, move the code to the common AMD UART support
block folder. The code is identical to the UART code in Cezanne,
Mendocino, Morgana and Picasso while Stoneyridge doesn't use the parts
related to the MMIO device driver.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id9429dac44bc02147a839db89d06e8eded7f1af2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68561
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
This commit is contained in:
Felix Held 2022-10-18 19:03:20 +02:00
parent 8ebdbbc3cb
commit 97e612586a
14 changed files with 150 additions and 439 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/soc/amd/cezanne/chipset.cb
View File

@ -111,7 +111,7 @@ chip soc/amd/cezanne
device mmio 0xfedc3000 alias i2c_1 off ops soc_amd_i2c_mmio_ops end
device mmio 0xfedc4000 alias i2c_2 off ops soc_amd_i2c_mmio_ops end
device mmio 0xfedc5000 alias i2c_3 off ops soc_amd_i2c_mmio_ops end
device mmio 0xfedc9000 alias uart_0 off ops cezanne_uart_mmio_ops end
device mmio 0xfedca000 alias uart_1 off ops cezanne_uart_mmio_ops end
device mmio 0xfedc9000 alias uart_0 off ops amd_uart_mmio_ops end
device mmio 0xfedca000 alias uart_1 off ops amd_uart_mmio_ops end
device mmio 0xfedd5000 alias emmc off ops amd_emmc_mmio_ops end
end

95
src/soc/amd/cezanne/uart.c
View File

@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/aoac.h>
#include <amdblocks/gpio.h>
#include <amdblocks/uart.h>
#include <commonlib/helpers.h>
@ -25,105 +24,13 @@ static const struct soc_uart_ctrlr_info uart_info[] = {
} },
};
static const struct soc_uart_ctrlr_info *soc_get_uart_ctrlr_info(size_t *num_ctrlrs)
const struct soc_uart_ctrlr_info *soc_get_uart_ctrlr_info(size_t *num_ctrlrs)
{
*num_ctrlrs = ARRAY_SIZE(uart_info);
return uart_info;
}
uintptr_t get_uart_base(unsigned int idx)
{
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (idx >= num_ctrlrs)
return 0;
return ctrlr[idx].base;
}
static enum cb_err get_uart_idx(uintptr_t base, const struct soc_uart_ctrlr_info *ctrlr,
size_t num_ctrlrs, unsigned int *idx)
{
unsigned int i;
for (i = 0; i < num_ctrlrs; i++) {
if (base == ctrlr[i].base) {
*idx = i;
return CB_SUCCESS;
}
}
return CB_ERR;
}
static enum cb_err get_uart_aoac_device(uintptr_t base, unsigned int *aoac_dev)
{
unsigned int idx;
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (get_uart_idx(base, ctrlr, num_ctrlrs, &idx) == CB_ERR)
return CB_ERR;
*aoac_dev = ctrlr[idx].aoac_device;
return CB_SUCCESS;
}
void clear_uart_legacy_config(void)
{
write16p(FCH_LEGACY_UART_DECODE, 0);
}
void set_uart_config(unsigned int idx)
{
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (idx >= num_ctrlrs)
return;
gpio_configure_pads(ctrlr[idx].mux, 2);
}
static const char *uart_acpi_name(const struct device *dev)
{
unsigned int idx;
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (get_uart_idx(dev->path.mmio.addr, ctrlr, num_ctrlrs, &idx) == CB_SUCCESS)
return ctrlr[idx].acpi_name;
else
return NULL;
}
/* Even though this is called enable, it gets called for both enabled and disabled devices. */
static void uart_enable(struct device *dev)
{
unsigned int dev_id;
if (get_uart_aoac_device(dev->path.mmio.addr, &dev_id) == CB_ERR) {
printk(BIOS_ERR, "%s: Unknown device: %s\n", __func__, dev_path(dev));
return;
}
if (dev->enabled) {
power_on_aoac_device(dev_id);
wait_for_aoac_enabled(dev_id);
} else {
power_off_aoac_device(dev_id);
}
}
static void uart_read_resources(struct device *dev)
{
mmio_resource_kb(dev, 0, dev->path.mmio.addr / KiB, 4);
}
struct device_operations cezanne_uart_mmio_ops = {
.read_resources = uart_read_resources,
.set_resources = noop_set_resources,
.scan_bus = scan_static_bus,
.enable = uart_enable,
.acpi_name = uart_acpi_name,
.acpi_fill_ssdt = uart_inject_ssdt,
};

4
src/soc/amd/common/block/include/amdblocks/uart.h
View File

@ -15,7 +15,9 @@ struct soc_uart_ctrlr_info {
};
uintptr_t get_uart_base(unsigned int idx); /* get MMIO base address of FCH UART */
void uart_inject_ssdt(const struct device *dev);
void set_uart_config(unsigned int idx); /* configure hardware of FCH UART selected by idx */
/* Getter function to get the SoC UART Controller Information. */
const struct soc_uart_ctrlr_info *soc_get_uart_ctrlr_info(size_t *num_ctrlrs);
#endif /* AMD_BLOCK_UART_H */

10
src/soc/amd/common/block/uart/Makefile.inc
View File

@ -1,11 +1,17 @@
ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_UART),y)
# all-y can't be used, since verstage on PSP has a different implementation
bootblock-y += uart.c
verstage_x86-y += uart.c
romstage-y += uart.c
postcar-y += uart.c
ramstage-y += uart.c
smm-$(CONFIG_DEBUG_SMI) += uart.c
all-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c
ifeq ($(CONFIG_DEBUG_SMI),y)
smm-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c
endif
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += uart_acpi.c
endif # CONFIG_SOC_AMD_COMMON_BLOCK_UART

113
src/soc/amd/common/block/uart/uart.c Normal file
View File

@ -0,0 +1,113 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpigen.h>
#include <amdblocks/aoac.h>
#include <amdblocks/gpio.h>
#include <amdblocks/uart.h>
#include <device/device.h>
uintptr_t get_uart_base(unsigned int idx)
{
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (idx >= num_ctrlrs)
return 0;
return ctrlr[idx].base;
}
static enum cb_err get_uart_idx(uintptr_t base, const struct soc_uart_ctrlr_info *ctrlr,
size_t num_ctrlrs, unsigned int *idx)
{
unsigned int i;
for (i = 0; i < num_ctrlrs; i++) {
if (base == ctrlr[i].base) {
*idx = i;
return CB_SUCCESS;
}
}
return CB_ERR;
}
static enum cb_err get_uart_aoac_device(uintptr_t base, unsigned int *aoac_dev)
{
unsigned int idx;
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (get_uart_idx(base, ctrlr, num_ctrlrs, &idx) == CB_ERR)
return CB_ERR;
*aoac_dev = ctrlr[idx].aoac_device;
return CB_SUCCESS;
}
void set_uart_config(unsigned int idx)
{
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (idx >= num_ctrlrs)
return;
gpio_configure_pads(ctrlr[idx].mux, 2);
}
#if CONFIG(HAVE_ACPI_TABLES)
static const char *uart_acpi_name(const struct device *dev)
{
unsigned int idx;
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (get_uart_idx(dev->path.mmio.addr, ctrlr, num_ctrlrs, &idx) == CB_SUCCESS)
return ctrlr[idx].acpi_name;
else
return NULL;
}
/* This gets called for both enabled and disabled devices. */
static void uart_inject_ssdt(const struct device *dev)
{
acpigen_write_scope(acpi_device_path(dev));
acpigen_write_STA(acpi_device_status(dev));
acpigen_pop_len(); /* Scope */
}
#endif
/* Even though this is called enable, it gets called for both enabled and disabled devices. */
static void uart_enable(struct device *dev)
{
unsigned int dev_id;
if (get_uart_aoac_device(dev->path.mmio.addr, &dev_id) == CB_ERR) {
printk(BIOS_ERR, "%s: Unknown device: %s\n", __func__, dev_path(dev));
return;
}
if (dev->enabled) {
power_on_aoac_device(dev_id);
wait_for_aoac_enabled(dev_id);
} else {
power_off_aoac_device(dev_id);
}
}
static void uart_read_resources(struct device *dev)
{
mmio_resource_kb(dev, 0, dev->path.mmio.addr / KiB, 4);
}
struct device_operations amd_uart_mmio_ops = {
.read_resources = uart_read_resources,
.set_resources = noop_set_resources,
.scan_bus = scan_static_bus,
.enable = uart_enable,
#if CONFIG(HAVE_ACPI_TABLES)
.acpi_name = uart_acpi_name,
.acpi_fill_ssdt = uart_inject_ssdt,
#endif
};

15
src/soc/amd/common/block/uart/uart_acpi.c
View File

@ -1,15 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpigen.h>
#include <amdblocks/uart.h>
#include <device/device.h>
/* This gets called for both enabled and disabled devices. */
void uart_inject_ssdt(const struct device *dev)
{
acpigen_write_scope(acpi_device_path(dev));
acpigen_write_STA(acpi_device_status(dev));
acpigen_pop_len(); /* Scope */
}

10
src/soc/amd/mendocino/chipset_mendocino.cb
View File

@ -88,10 +88,10 @@ chip soc/amd/mendocino
device mmio 0xfedc3000 alias i2c_1 off ops soc_amd_i2c_mmio_ops end
device mmio 0xfedc4000 alias i2c_2 off ops soc_amd_i2c_mmio_ops end
device mmio 0xfedc5000 alias i2c_3 off ops soc_amd_i2c_mmio_ops end
device mmio 0xfedc9000 alias uart_0 off ops mendocino_uart_mmio_ops end
device mmio 0xfedca000 alias uart_1 off ops mendocino_uart_mmio_ops end
device mmio 0xfedce000 alias uart_2 off ops mendocino_uart_mmio_ops end
device mmio 0xfedcf000 alias uart_3 off ops mendocino_uart_mmio_ops end
device mmio 0xfedd1000 alias uart_4 off ops mendocino_uart_mmio_ops end
device mmio 0xfedc9000 alias uart_0 off ops amd_uart_mmio_ops end
device mmio 0xfedca000 alias uart_1 off ops amd_uart_mmio_ops end
device mmio 0xfedce000 alias uart_2 off ops amd_uart_mmio_ops end
device mmio 0xfedcf000 alias uart_3 off ops amd_uart_mmio_ops end
device mmio 0xfedd1000 alias uart_4 off ops amd_uart_mmio_ops end
device mmio 0xfedd5000 alias emmc off ops amd_emmc_mmio_ops end
end

10
src/soc/amd/mendocino/chipset_rembrandt.cb
View File

@ -88,10 +88,10 @@ chip soc/amd/mendocino
device mmio 0xfedc3000 alias i2c_1 off ops soc_amd_i2c_mmio_ops end
device mmio 0xfedc4000 alias i2c_2 off ops soc_amd_i2c_mmio_ops end
device mmio 0xfedc5000 alias i2c_3 off ops soc_amd_i2c_mmio_ops end
device mmio 0xfedc9000 alias uart_0 off ops mendocino_uart_mmio_ops end
device mmio 0xfedca000 alias uart_1 off ops mendocino_uart_mmio_ops end
device mmio 0xfedce000 alias uart_2 off ops mendocino_uart_mmio_ops end
device mmio 0xfedcf000 alias uart_3 off ops mendocino_uart_mmio_ops end
device mmio 0xfedd1000 alias uart_4 off ops mendocino_uart_mmio_ops end
device mmio 0xfedc9000 alias uart_0 off ops amd_uart_mmio_ops end
device mmio 0xfedca000 alias uart_1 off ops amd_uart_mmio_ops end
device mmio 0xfedce000 alias uart_2 off ops amd_uart_mmio_ops end
device mmio 0xfedcf000 alias uart_3 off ops amd_uart_mmio_ops end
device mmio 0xfedd1000 alias uart_4 off ops amd_uart_mmio_ops end
device mmio 0xfedd5000 alias emmc off ops amd_emmc_mmio_ops end
end

95
src/soc/amd/mendocino/uart.c
View File

@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/aoac.h>
#include <amdblocks/gpio.h>
#include <amdblocks/uart.h>
#include <commonlib/helpers.h>
@ -37,105 +36,13 @@ static const struct soc_uart_ctrlr_info uart_info[] = {
} },
};
static const struct soc_uart_ctrlr_info *soc_get_uart_ctrlr_info(size_t *num_ctrlrs)
const struct soc_uart_ctrlr_info *soc_get_uart_ctrlr_info(size_t *num_ctrlrs)
{
*num_ctrlrs = ARRAY_SIZE(uart_info);
return uart_info;
}
uintptr_t get_uart_base(unsigned int idx)
{
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (idx >= num_ctrlrs)
return 0;
return ctrlr[idx].base;
}
static enum cb_err get_uart_idx(uintptr_t base, const struct soc_uart_ctrlr_info *ctrlr,
size_t num_ctrlrs, unsigned int *idx)
{
unsigned int i;
for (i = 0; i < num_ctrlrs; i++) {
if (base == ctrlr[i].base) {
*idx = i;
return CB_SUCCESS;
}
}
return CB_ERR;
}
static enum cb_err get_uart_aoac_device(uintptr_t base, unsigned int *aoac_dev)
{
unsigned int idx;
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (get_uart_idx(base, ctrlr, num_ctrlrs, &idx) == CB_ERR)
return CB_ERR;
*aoac_dev = ctrlr[idx].aoac_device;
return CB_SUCCESS;
}
void clear_uart_legacy_config(void)
{
write16p(FCH_LEGACY_UART_DECODE, 0);
}
void set_uart_config(unsigned int idx)
{
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (idx >= num_ctrlrs)
return;
gpio_configure_pads(ctrlr[idx].mux, 2);
}
static const char *uart_acpi_name(const struct device *dev)
{
unsigned int idx;
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (get_uart_idx(dev->path.mmio.addr, ctrlr, num_ctrlrs, &idx) == CB_SUCCESS)
return ctrlr[idx].acpi_name;
else
return NULL;
}
/* Even though this is called enable, it gets called for both enabled and disabled devices. */
static void uart_enable(struct device *dev)
{
unsigned int dev_id;
if (get_uart_aoac_device(dev->path.mmio.addr, &dev_id) == CB_ERR) {
printk(BIOS_ERR, "%s: Unknown device: %s\n", __func__, dev_path(dev));
return;
}
if (dev->enabled) {
power_on_aoac_device(dev_id);
wait_for_aoac_enabled(dev_id);
} else {
power_off_aoac_device(dev_id);
}
}
static void uart_read_resources(struct device *dev)
{
mmio_resource_kb(dev, 0, dev->path.mmio.addr / KiB, 4);
}
struct device_operations mendocino_uart_mmio_ops = {
.read_resources = uart_read_resources,
.set_resources = noop_set_resources,
.scan_bus = scan_static_bus,
.enable = uart_enable,
.acpi_name = uart_acpi_name,
.acpi_fill_ssdt = uart_inject_ssdt,
};

10
src/soc/amd/morgana/chipset.cb
View File

@ -90,10 +90,10 @@ chip soc/amd/morgana
device mmio 0xfedc3000 alias i2c_1 off ops soc_amd_i2c_mmio_ops end
device mmio 0xfedc4000 alias i2c_2 off ops soc_amd_i2c_mmio_ops end
device mmio 0xfedc5000 alias i2c_3 off ops soc_amd_i2c_mmio_ops end
device mmio 0xfedc9000 alias uart_0 off ops morgana_uart_mmio_ops end
device mmio 0xfedca000 alias uart_1 off ops morgana_uart_mmio_ops end
device mmio 0xfedce000 alias uart_2 off ops morgana_uart_mmio_ops end
device mmio 0xfedcf000 alias uart_3 off ops morgana_uart_mmio_ops end
device mmio 0xfedd1000 alias uart_4 off ops morgana_uart_mmio_ops end
device mmio 0xfedc9000 alias uart_0 off ops amd_uart_mmio_ops end
device mmio 0xfedca000 alias uart_1 off ops amd_uart_mmio_ops end
device mmio 0xfedce000 alias uart_2 off ops amd_uart_mmio_ops end
device mmio 0xfedcf000 alias uart_3 off ops amd_uart_mmio_ops end
device mmio 0xfedd1000 alias uart_4 off ops amd_uart_mmio_ops end
device mmio 0xfedd5000 alias emmc off ops amd_emmc_mmio_ops end
end

95
src/soc/amd/morgana/uart.c
View File

@ -2,7 +2,6 @@
/* TODO: Update for Morgana */
#include <amdblocks/aoac.h>
#include <amdblocks/gpio.h>
#include <amdblocks/uart.h>
#include <commonlib/helpers.h>
@ -39,105 +38,13 @@ static const struct soc_uart_ctrlr_info uart_info[] = {
} },
};
static const struct soc_uart_ctrlr_info *soc_get_uart_ctrlr_info(size_t *num_ctrlrs)
const struct soc_uart_ctrlr_info *soc_get_uart_ctrlr_info(size_t *num_ctrlrs)
{
*num_ctrlrs = ARRAY_SIZE(uart_info);
return uart_info;
}
uintptr_t get_uart_base(unsigned int idx)
{
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (idx >= num_ctrlrs)
return 0;
return ctrlr[idx].base;
}
static enum cb_err get_uart_idx(uintptr_t base, const struct soc_uart_ctrlr_info *ctrlr,
size_t num_ctrlrs, unsigned int *idx)
{
unsigned int i;
for (i = 0; i < num_ctrlrs; i++) {
if (base == ctrlr[i].base) {
*idx = i;
return CB_SUCCESS;
}
}
return CB_ERR;
}
static enum cb_err get_uart_aoac_device(uintptr_t base, unsigned int *aoac_dev)
{
unsigned int idx;
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (get_uart_idx(base, ctrlr, num_ctrlrs, &idx) == CB_ERR)
return CB_ERR;
*aoac_dev = ctrlr[idx].aoac_device;
return CB_SUCCESS;
}
void clear_uart_legacy_config(void)
{
write16p(FCH_LEGACY_UART_DECODE, 0);
}
void set_uart_config(unsigned int idx)
{
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (idx >= num_ctrlrs)
return;
gpio_configure_pads(ctrlr[idx].mux, 2);
}
static const char *uart_acpi_name(const struct device *dev)
{
unsigned int idx;
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (get_uart_idx(dev->path.mmio.addr, ctrlr, num_ctrlrs, &idx) == CB_SUCCESS)
return ctrlr[idx].acpi_name;
else
return NULL;
}
/* Even though this is called enable, it gets called for both enabled and disabled devices. */
static void uart_enable(struct device *dev)
{
unsigned int dev_id;
if (get_uart_aoac_device(dev->path.mmio.addr, &dev_id) == CB_ERR) {
printk(BIOS_ERR, "%s: Unknown device: %s\n", __func__, dev_path(dev));
return;
}
if (dev->enabled) {
power_on_aoac_device(dev_id);
wait_for_aoac_enabled(dev_id);
} else {
power_off_aoac_device(dev_id);
}
}
static void uart_read_resources(struct device *dev)
{
mmio_resource_kb(dev, 0, dev->path.mmio.addr / KiB, 4);
}
struct device_operations morgana_uart_mmio_ops = {
.read_resources = uart_read_resources,
.set_resources = noop_set_resources,
.scan_bus = scan_static_bus,
.enable = uart_enable,
.acpi_name = uart_acpi_name,
.acpi_fill_ssdt = uart_inject_ssdt,
};

8
src/soc/amd/picasso/chipset.cb
View File

@ -49,8 +49,8 @@ chip soc/amd/picasso
device mmio 0xfedc4000 alias i2c_2 off ops soc_amd_i2c_mmio_ops end
device mmio 0xfedc5000 alias i2c_3 off ops soc_amd_i2c_mmio_ops end
device mmio 0xfedc9000 alias uart_0 off ops picasso_uart_mmio_ops end
device mmio 0xfedca000 alias uart_1 off ops picasso_uart_mmio_ops end
device mmio 0xfedce000 alias uart_2 off ops picasso_uart_mmio_ops end
device mmio 0xfedcf000 alias uart_3 off ops picasso_uart_mmio_ops end
device mmio 0xfedc9000 alias uart_0 off ops amd_uart_mmio_ops end
device mmio 0xfedca000 alias uart_1 off ops amd_uart_mmio_ops end
device mmio 0xfedce000 alias uart_2 off ops amd_uart_mmio_ops end
device mmio 0xfedcf000 alias uart_3 off ops amd_uart_mmio_ops end
end

95
src/soc/amd/picasso/uart.c
View File

@ -5,7 +5,6 @@
#include <device/device.h>
#include <device/mmio.h>
#include <amdblocks/gpio.h>
#include <amdblocks/aoac.h>
#include <amdblocks/uart.h>
#include <soc/aoac_defs.h>
#include <soc/gpio.h>
@ -33,105 +32,13 @@ static const struct soc_uart_ctrlr_info uart_info[] = {
} },
};
static const struct soc_uart_ctrlr_info *soc_get_uart_ctrlr_info(size_t *num_ctrlrs)
const struct soc_uart_ctrlr_info *soc_get_uart_ctrlr_info(size_t *num_ctrlrs)
{
*num_ctrlrs = ARRAY_SIZE(uart_info);
return uart_info;
}
uintptr_t get_uart_base(unsigned int idx)
{
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (idx >= num_ctrlrs)
return 0;
return ctrlr[idx].base;
}
static enum cb_err get_uart_idx(uintptr_t base, const struct soc_uart_ctrlr_info *ctrlr,
size_t num_ctrlrs, unsigned int *idx)
{
unsigned int i;
for (i = 0; i < num_ctrlrs; i++) {
if (base == ctrlr[i].base) {
*idx = i;
return CB_SUCCESS;
}
}
return CB_ERR;
}
static enum cb_err get_uart_aoac_device(uintptr_t base, unsigned int *aoac_dev)
{
unsigned int idx;
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (get_uart_idx(base, ctrlr, num_ctrlrs, &idx) == CB_ERR)
return CB_ERR;
*aoac_dev = ctrlr[idx].aoac_device;
return CB_SUCCESS;
}
void clear_uart_legacy_config(void)
{
write16p(FCH_LEGACY_UART_DECODE, 0);
}
void set_uart_config(unsigned int idx)
{
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (idx >= num_ctrlrs)
return;
gpio_configure_pads(ctrlr[idx].mux, 2);
}
static const char *uart_acpi_name(const struct device *dev)
{
unsigned int idx;
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (get_uart_idx(dev->path.mmio.addr, ctrlr, num_ctrlrs, &idx) == CB_SUCCESS)
return ctrlr[idx].acpi_name;
else
return NULL;
}
/* Even though this is called enable, it gets called for both enabled and disabled devices. */
static void uart_enable(struct device *dev)
{
unsigned int dev_id;
if (get_uart_aoac_device(dev->path.mmio.addr, &dev_id) == CB_ERR) {
printk(BIOS_ERR, "%s: Unknown device: %s\n", __func__, dev_path(dev));
return;
}
if (dev->enabled) {
power_on_aoac_device(dev_id);
wait_for_aoac_enabled(dev_id);
} else {
power_off_aoac_device(dev_id);
}
}
static void uart_read_resources(struct device *dev)
{
mmio_resource_kb(dev, 0, dev->path.mmio.addr / KiB, 4);
}
struct device_operations picasso_uart_mmio_ops = {
.read_resources = uart_read_resources,
.set_resources = noop_set_resources,
.scan_bus = scan_static_bus,
.acpi_name = uart_acpi_name,
.enable = uart_enable,
.acpi_fill_ssdt = uart_inject_ssdt,
};

25
src/soc/amd/stoneyridge/uart.c
View File

@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/aoac.h>
#include <amdblocks/gpio.h>
#include <amdblocks/uart.h>
#include <soc/aoac_defs.h>
@ -19,30 +18,8 @@ static const struct soc_uart_ctrlr_info uart_info[] = {
} },
};
static const struct soc_uart_ctrlr_info *soc_get_uart_ctrlr_info(size_t *num_ctrlrs)
const struct soc_uart_ctrlr_info *soc_get_uart_ctrlr_info(size_t *num_ctrlrs)
{
*num_ctrlrs = ARRAY_SIZE(uart_info);
return uart_info;
}
uintptr_t get_uart_base(unsigned int idx)
{
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (idx >= num_ctrlrs)
return 0;
return ctrlr[idx].base;
}
void set_uart_config(unsigned int idx)
{
size_t num_ctrlrs;
const struct soc_uart_ctrlr_info *ctrlr = soc_get_uart_ctrlr_info(&num_ctrlrs);
if (idx >= num_ctrlrs)
return;
gpio_configure_pads(ctrlr[idx].mux, 2);
}