pit: Bump the EC SPI bus speed up to 5 MHz
That speed is used with U-Boot instead of the more conservative 500 KHz. Change-Id: Ie9d79db3b52b88c1f3bfec1745634ae6bdc9f4ee Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/63193 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/4386 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
parent
e13680bdd0
commit
980180962a
|
@ -126,7 +126,7 @@ static void setup_ec(void)
|
|||
{
|
||||
/* SPI2 (EC) is slower and needs to work in half-duplex mode with
|
||||
* single byte bus width. */
|
||||
clock_set_rate(PERIPH_ID_SPI2, 500000);
|
||||
clock_set_rate(PERIPH_ID_SPI2, 5000000);
|
||||
exynos_pinmux_spi2();
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in New Issue