MAINTAINERS: Designate Intel maintainers for FSP 1.0 Rangeley

After several internal discussions, teams at Intel with stakes in
coreboot have decided to each assign one or more maintainers. These
maintainers can be expected to provide a point of contact for
assistance with technical (code-related) issues, testing on real
hardware, and making sure that their FSP-related areas continue to
function with upstream coreboot.

They understand that the inclusion of their information in the
MAINTAINERS file does not give them any extra power over their areas.
At the same time, nobody expects any community process to change.
The one expectation is that reasonable efforts be made to contact
these maintainers when making fundamental changes to their areas, or
when discussing code removal.

Change-Id: I7af7b37a5e3a233cc29adb20dd5bb8fa07dbdd53
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12643
Tested-by: build bot (Jenkins)
Reviewed-by: David Guckian <david.guckian@intel.com>

MAINTAINERS

@@ -150,6 +150,21 @@ M:	Martin Roth <gaumless@gmail.com>
 S:	Odd Fixes
 F:	src/soc/intel/fsp_baytrail/
 
+FSP 1.0 RANGELEY & CRB
+M:	David Guckian <david.guckian@intel.com>
+M:	Fei Wang <fei.z.wang@intel.com>
+S:	Supported
+F:	src/cpu/intel/fsp_model_406dx/
+F:	src/northbridge/intel/fsp_rangeley/
+F:	src/southbridge/intel/fsp_rangeley/
+F:	src/vendorcode/intel/fsp1_0/rangeley/
+F:	src/mainboard/intel/mohonpeak/
+
+INTEL LITTLE PLAINS MAINBOARD
+M:	Marcin Wojciechowski <marcin.wojciechowski@intel.com>
+S:	Supported
+F:	src/mainboard/intel/littleplains/
+
 INTEL FSP 1.0
 M:	Martin Roth <gaumless@gmail.com>
 S:	Odd Fixes