mb/google/volteer/var/elemi: Update gpio
1. Config EN_PP3300_SSD (GPP_B2) to gpo 2. EMMC_CLKREQ_ODL(GPP_C1) change to GPP_H11 3. WLAN_PERST_L (GPP_H10) change to GPP_H10 BUG=b:172630765, b:171467336 BRANCH=volteer TEST=emerge-volteer coreboot chromeos-bootimage and boot into emmc Change-Id: I9d112373c4ecd2cea5ce3d2d47b190c061d50da6 Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47705 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -26,7 +26,7 @@ static const struct pad_config override_gpio_table[] = {
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PAD_CFG_NF(GPP_A23, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A23, NONE, DEEP, NF1),
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/* B2 : VRALERT# ==> EN_PP3300_SSD */
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/* B2 : VRALERT# ==> EN_PP3300_SSD */
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PAD_CFG_NF(GPP_B2, NONE, DEEP, NF1),
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PAD_CFG_GPO(GPP_B2, 1, DEEP),
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/* B3 : CPU_GP2 ==> PEN_DET_ODL */
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/* B3 : CPU_GP2 ==> PEN_DET_ODL */
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PAD_CFG_GPI(GPP_B3, NONE, DEEP),
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PAD_CFG_GPI(GPP_B3, NONE, DEEP),
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/* B4 : CPU_GP3==> EN_PP3300_EMMC */
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/* B4 : CPU_GP3==> EN_PP3300_EMMC */
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@ -48,8 +48,6 @@ static const struct pad_config override_gpio_table[] = {
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/* C0 : SMBCLK ==> EN_PP3300_WLAN */
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/* C0 : SMBCLK ==> EN_PP3300_WLAN */
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PAD_CFG_GPO(GPP_C0, 1, DEEP),
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PAD_CFG_GPO(GPP_C0, 1, DEEP),
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/* C1 : SMBCLK ==> EMMC_CLKREQ_ODL*/
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PAD_CFG_GPO(GPP_C1, 1, DEEP),
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/* C2 : SMBALERT# ==> GPP_C2_STRAP */
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/* C2 : SMBALERT# ==> GPP_C2_STRAP */
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PAD_NC(GPP_C2, DN_20K),
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PAD_NC(GPP_C2, DN_20K),
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/* C3 : EMMC_PE_WAKE_ODL*/
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/* C3 : EMMC_PE_WAKE_ODL*/
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@ -78,7 +76,6 @@ static const struct pad_config override_gpio_table[] = {
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/* D6 : SRCCLKREQ1# ==> WLAN_CLKREQ_ODL */
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/* D6 : SRCCLKREQ1# ==> WLAN_CLKREQ_ODL */
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PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1),
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/* D7 : SRCCLKREQ2# ==> WWAN_CLKREQ_ODL */
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/* D8 : SRCCLKREQ3# ==> SD_CLKREQ_ODL */
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/* D8 : SRCCLKREQ3# ==> SD_CLKREQ_ODL */
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PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1),
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/* D12 : ISH_SPI_MOSI ==> PCH_GSPI2_CVF_MOSI_STRAP */
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/* D12 : ISH_SPI_MOSI ==> PCH_GSPI2_CVF_MOSI_STRAP */
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@ -139,10 +136,10 @@ static const struct pad_config override_gpio_table[] = {
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PAD_NC(GPP_H2, DN_20K),
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PAD_NC(GPP_H2, DN_20K),
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/* H3 : SX_EXIT_HOLDOFF# ==> SD_PERST_L */
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/* H3 : SX_EXIT_HOLDOFF# ==> SD_PERST_L */
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PAD_CFG_GPO(GPP_H3, 1, DEEP),
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PAD_CFG_GPO(GPP_H3, 1, DEEP),
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/* H10 : SRCCLKREQ4# */
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/* H10 : SRCCLKREQ4# ==> WLAN_PERST_L*/
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PAD_CFG_NF(GPP_H10, NONE, DEEP, NF1),
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PAD_CFG_GPO(GPP_H10, 1, DEEP),
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/* H11 : SRCCLKREQ5# ==> WLAN_PERST_L */
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/* H11 : SRCCLKREQ5# ==> EMMC_CLKREQ_ODL*/
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PAD_CFG_GPO(GPP_H11, 1, DEEP),
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PAD_CFG_NF(GPP_H11, NONE, DEEP, NF1),
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/* H16 : DDPB_CTRLCLK ==> DDIB_HDMI_CTRLCLK */
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/* H16 : DDPB_CTRLCLK ==> DDIB_HDMI_CTRLCLK */
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PAD_CFG_NF(GPP_H16, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_H16, NONE, DEEP, NF1),
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/* H17 : DDPB_CTRLDATA ==> DDPB_HDMI_CTRLDATA */
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/* H17 : DDPB_CTRLDATA ==> DDPB_HDMI_CTRLDATA */
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@ -185,6 +182,11 @@ static const struct pad_config early_gpio_table[] = {
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PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
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/* A17 : DDSP_HPDC ==> MEM_CH_SEL */
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/* A17 : DDSP_HPDC ==> MEM_CH_SEL */
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PAD_CFG_GPI(GPP_A17, NONE, DEEP),
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PAD_CFG_GPI(GPP_A17, NONE, DEEP),
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/* B2 : VRALERT# ==> EN_PP3300_SSD */
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PAD_CFG_GPO(GPP_B2, 1, DEEP),
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/* B4 : CPU_GP3==> EN_PP3300_EMMC */
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PAD_CFG_GPO(GPP_B4, 1, DEEP),
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/* B11 : PMCALERT# ==> PCH_WP_OD */
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/* B11 : PMCALERT# ==> PCH_WP_OD */
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PAD_CFG_GPI_GPIO_DRIVER(GPP_B11, NONE, DEEP),
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PAD_CFG_GPI_GPIO_DRIVER(GPP_B11, NONE, DEEP),
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@ -207,8 +209,8 @@ static const struct pad_config early_gpio_table[] = {
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/* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */
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/* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */
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PAD_CFG_GPO(GPP_D16, 1, DEEP),
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PAD_CFG_GPO(GPP_D16, 1, DEEP),
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/* H11 : SRCCLKREQ5# ==> WLAN_PERST_L */
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/* H10 : SRCCLKREQ5# ==> WLAN_PERST_L */
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PAD_CFG_GPO(GPP_H11, 1, DEEP),
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PAD_CFG_GPO(GPP_H10, 1, DEEP),
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};
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};
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const struct pad_config *variant_override_gpio_table(size_t *num)
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const struct pad_config *variant_override_gpio_table(size_t *num)
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