More kconfig:

AMD LX
AMD SC520
boards by iei, pcengines, technexion, technologic, thomson

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4743 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/cpu/amd/Kconfig

@@ -15,3 +15,6 @@ source src/cpu/amd/model_fxx/Kconfig
 source src/cpu/amd/model_10xxx/Kconfig
 source src/cpu/amd/model_gx1/Kconfig
 source src/cpu/amd/model_gx2/Kconfig
+source src/cpu/amd/model_lx/Kconfig
+
+source src/cpu/amd/sc520/Kconfig

src/cpu/amd/Makefile.inc

@@ -4,4 +4,6 @@ subdirs-$(CONFIG_CPU_AMD_SOCKET_940) += socket_940
 subdirs-$(CONFIG_CPU_AMD_SOCKET_AM2) += socket_AM2
 subdirs-$(CONFIG_CPU_AMD_GX1) += model_gx1
 subdirs-$(CONFIG_CPU_AMD_GX2) += model_gx2
+subdirs-$(CONFIG_CPU_AMD_LX) += model_lx
+subdirs-$(CONFIG_CPU_AMD_SC520) += sc520
 subdirs-$(CONFIG_CPU_AMD_SOCKET_S1G1) += socket_S1G1

src/cpu/amd/model_lx/Kconfig

@@ -0,0 +1,4 @@
+config CPU_AMD_LX
+	bool
+	default n
+

src/cpu/amd/model_lx/Makefile.inc

@@ -0,0 +1,10 @@
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/fpu
+subdirs-y += ../../x86/mmx
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/smm
+
+driver-y += model_lx_init.o
+obj-y += cpubug.o
+obj-y += vsmsetup.o

src/cpu/amd/sc520/Kconfig

@@ -0,0 +1,4 @@
+config CPU_AMD_SC520
+	bool
+	default n
+

src/cpu/amd/sc520/Makefile.inc

@@ -0,0 +1 @@
+obj-y += sc520.o

src/cpu/amd/socket_S1G1/Makefile.inc

@@ -11,4 +11,5 @@ subdirs-y += ../../x86/lapic
 subdirs-y += ../../x86/cache
 subdirs-y += ../../x86/pae
 subdirs-y += ../../x86/smm
+subdirs-y += ../../x86/mtrr
 

src/mainboard/iei/Kconfig

@@ -24,6 +24,7 @@ choice
 
 source "src/mainboard/iei/juki-511p/Kconfig"
 source "src/mainboard/iei/nova4899r/Kconfig"
+source "src/mainboard/iei/pcisa-lx-800-r10/Kconfig"
 
 endchoice
 

src/mainboard/iei/pcisa-lx-800-r10/Kconfig

@@ -0,0 +1,49 @@
+config BOARD_IEI_PCISA_LX_800_R10
+	bool "PCISA lx-800 r10"
+	select ARCH_X86
+	select CPU_AMD_LX
+	select NORTHBRIDGE_AMD_LX
+	select SOUTHBRIDGE_AMD_CS5536
+	select SUPERIO_WINBOND_W83627HF
+	select HAVE_PIRQ_TABLE
+	select PIRQ_ROUTE
+	select UDELAY_TSC
+	select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
+	select USE_DCACHE_RAM
+	select USE_PRINTK_IN_CAR
+
+config MAINBOARD_DIR
+	string
+	default iei/pcisa-lx-800-r10 
+	depends on BOARD_IEI_PCISA_LX_800_R10
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "PCISALX800R10"
+	depends on BOARD_IEI_PCISA_LX_800_R10
+
+config HAVE_OPTION_TABLE
+	bool
+	default n
+	depends on BOARD_IEI_PCISA_LX_800_R10
+
+config IRQ_SLOT_COUNT
+	int
+	default 9
+	depends on BOARD_IEI_PCISA_LX_800_R10
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xc8000
+	depends on BOARD_IEI_PCISA_LX_800_R10
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x8000
+	depends on BOARD_IEI_PCISA_LX_800_R10
+
+config RAMBASE
+	hex
+	default 0x4000
+	depends on BOARD_IEI_PCISA_LX_800_R10
+

src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc

@@ -0,0 +1,31 @@
+driver-y += mainboard.o
+
+# Needed by irq_tables and mptable and acpi_tables.
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/model_lx/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+	perl -e 's/\.rodata/.rom.data/g' -pi $@
+	perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+

src/mainboard/pcengines/Kconfig

@@ -1 +1,8 @@
-#
+choice
+	prompt "Mainboard model"
+	depends on VENDOR_PC_ENGINES
+        
+source "src/mainboard/pcengines/alix1c/Kconfig"
+
+endchoice
+

src/mainboard/pcengines/alix1c/Kconfig

@@ -0,0 +1,48 @@
+config BOARD_PCENGINES_ALIX1C
+	bool "alix.1c"
+	select ARCH_X86
+	select CPU_AMD_LX
+	select NORTHBRIDGE_AMD_LX
+	select SOUTHBRIDGE_AMD_CS5536
+	select SUPERIO_WINBOND_W83627HF
+	select HAVE_PIRQ_TABLE
+	select PIRQ_ROUTE
+	select UDELAY_TSC
+	select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
+	select USE_DCACHE_RAM
+	select USE_PRINTK_IN_CAR
+
+config MAINBOARD_DIR
+	string
+	default pcengines/alix1c 
+	depends on BOARD_PCENGINES_ALIX1C
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "ALIX.1C"
+	depends on BOARD_PCENGINES_ALIX1C
+
+config HAVE_OPTION_TABLE
+	bool
+	default n
+	depends on BOARD_PCENGINES_ALIX1C
+
+config IRQ_SLOT_COUNT
+	int
+	default 5
+	depends on BOARD_PCENGINES_ALIX1C
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xc8000
+	depends on BOARD_PCENGINES_ALIX1C
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x8000
+	depends on BOARD_PCENGINES_ALIX1C
+
+config RAMBASE
+	hex
+	default 0x4000
+	depends on BOARD_PCENGINES_ALIX1C

src/mainboard/pcengines/alix1c/Makefile.inc

@@ -0,0 +1,31 @@
+driver-y += mainboard.o
+
+# Needed by irq_tables and mptable and acpi_tables.
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/model_lx/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+	perl -e 's/\.rodata/.rom.data/g' -pi $@
+	perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+

src/mainboard/technexion/Kconfig

@@ -1 +1,8 @@
-#
+choice
+	prompt "Mainboard model"
+	depends on VENDOR_TECHNEXION
+        
+source "src/mainboard/technexion/tim8690/Kconfig"
+
+endchoice
+

src/mainboard/technexion/tim8690/Kconfig

@@ -0,0 +1,105 @@
+config BOARD_TECHNEXION_TIM8690
+	bool "Tim8690"
+	select ARCH_X86
+	select CPU_AMD_K8
+	select CPU_AMD_SOCKET_S1G1
+	select NORTHBRIDGE_AMD_AMDK8
+	select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+	select SOUTHBRIDGE_AMD_RS690
+	select SOUTHBRIDGE_AMD_SB600
+	select SUPERIO_ITE_IT8712F
+	select HAVE_PIRQ_TABLE
+	select USE_PRINTK_IN_CAR
+	select USE_DCACHE_RAM
+	select HAVE_HARD_RESET
+	select IOAPIC
+	select MEM_TRAIN_SEQ
+	select AP_CODE_IN_CAR
+	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+	select WAIT_BEFORE_CPUS_INIT
+	select HAVE_ACPI_TABLES
+
+config MAINBOARD_DIR
+	string
+	default technexion/tim8690
+	depends on BOARD_TECHNEXION_TIM8690
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xc8000
+	depends on BOARD_TECHNEXION_TIM8690
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x08000
+	depends on BOARD_TECHNEXION_TIM8690
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+	hex
+	default 0x01000
+	depends on BOARD_TECHNEXION_TIM8690
+
+config APIC_ID_OFFSET
+	hex
+	default 0x8
+	depends on BOARD_TECHNEXION_TIM8690
+
+config LB_CKS_RANGE_END
+	int
+	default 122
+	depends on BOARD_TECHNEXION_TIM8690
+
+config LB_CKS_LOC
+	int
+	default 123
+	depends on BOARD_TECHNEXION_TIM8690
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "tim8690"
+	depends on BOARD_TECHNEXION_TIM8690
+
+config HW_MEM_HOLE_SIZEK
+	hex
+	default 0x100000
+	depends on BOARD_TECHNEXION_TIM8690
+
+config MAX_CPUS
+	int
+	default 2
+	depends on BOARD_TECHNEXION_TIM8690
+
+config MAX_PHYSICAL_CPUS
+	int
+	default 1
+	depends on BOARD_TECHNEXION_TIM8690
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+	bool
+	default n
+	depends on BOARD_TECHNEXION_TIM8690
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_TECHNEXION_TIM8690
+
+config HT_CHAIN_END_UNITID_BASE
+	hex
+	default 0x6
+	depends on BOARD_TECHNEXION_TIM8690
+
+config HT_CHAIN_UNITID_BASE
+	hex
+	default 0xa
+	depends on BOARD_TECHNEXION_TIM8690
+
+config USE_INIT
+	bool
+	default n
+	depends on BOARD_TECHNEXION_TIM8690
+
+config IRQ_SLOT_COUNT
+	int
+	default 11
+	depends on BOARD_TECHNEXION_TIM8690

src/mainboard/technexion/tim8690/Makefile.inc

@@ -0,0 +1,64 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+# Needed by irq_tables and mptable and acpi_tables.
+obj-y += get_bus_conf.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += fadt.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
+	iasl -p $(obj)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
+	mv $(obj)/dsdt.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+	perl -e 's/\.rodata/.rom.data/g' -pi $@
+	perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+

src/mainboard/technologic/Kconfig

@@ -1 +1,8 @@
-#
+choice
+	prompt "Mainboard model"
+	depends on VENDOR_TECHNOLOGIC
+        
+source "src/mainboard/technologic/ts5300/Kconfig"
+
+endchoice
+

src/mainboard/technologic/ts5300/Kconfig

@@ -0,0 +1,21 @@
+config BOARD_TECHNOLOGIC_TS5300
+	bool "ts5300"
+	select ARCH_X86
+	select CPU_AMD_SC520
+	select HAVE_PIRQ_TABLE
+
+config MAINBOARD_DIR
+	string
+	default technologic/ts5300
+	depends on BOARD_TECHNOLOGIC_TS5300
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "TS5300"
+	depends on BOARD_TECHNOLOGIC_TS5300
+
+config IRQ_SLOT_COUNT
+	int
+	default 2
+	depends on BOARD_TECHNOLOGIC_TS5300
+

src/mainboard/technologic/ts5300/Makefile.inc

@@ -0,0 +1,3 @@
+ROMCCFLAGS := -mcpu=i386 -O
+include $(src)/mainboard/Makefile.romccboard.inc
+

src/mainboard/thomson/Kconfig

@@ -1 +1,8 @@
-#
+choice
+	prompt "Mainboard model"
+	depends on VENDOR_THOMSON
+        
+source "src/mainboard/thomson/ip1000/Kconfig"
+
+endchoice
+

src/mainboard/thomson/ip1000/Kconfig

@@ -0,0 +1,35 @@
+config BOARD_THOMSON_IP1000
+	bool "ip1000"
+	select ARCH_X86
+	select CPU_INTEL_SOCKET_PGA370
+	select NORTHBRIDGE_INTEL_I82830
+	select SOUTHBRIDGE_INTEL_I82801XX
+	select SUPERIO_SMSC_SMSCSUPERIO
+	select HAVE_PIRQ_TABLE
+	select UDELAY_TSC
+
+config MAINBOARD_DIR
+	string
+	default thomson/ip1000
+	depends on BOARD_THOMSON_IP1000
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "IP1000"
+	depends on BOARD_THOMSON_IP1000
+
+config HAVE_OPTION_TABLE
+	bool
+	default n
+	depends on BOARD_THOMSON_IP1000
+
+config IRQ_SLOT_COUNT
+	int
+	default 7
+	depends on BOARD_THOMSON_IP1000
+
+config VIDEO_MB
+	int
+	default 0
+	depends on BOARD_THOMSON_IP1000
+

src/mainboard/thomson/ip1000/Makefile.inc

@@ -0,0 +1,4 @@
+ROMCCFLAGS=-mcpu=p3 -O
+
+include $(src)/mainboard/Makefile.romccboard.inc
+

src/northbridge/amd/Kconfig

@@ -2,4 +2,4 @@ source src/northbridge/amd/amdk8/Kconfig
 source src/northbridge/amd/gx1/Kconfig
 source src/northbridge/amd/gx2/Kconfig
 source src/northbridge/amd/amdfam10/Kconfig
-#source src/northbridge/amd/lx/Kconfig
+source src/northbridge/amd/lx/Kconfig

src/northbridge/amd/lx/Kconfig

@@ -0,0 +1,8 @@
+config NORTHBRIDGE_AMD_LX
+	bool
+	default n
+
+config HAVE_HIGH_TABLES
+	bool
+	default y
+	depends on NORTHBRIDGE_AMD_LX

src/northbridge/amd/lx/Makefile.inc

@@ -0,0 +1,3 @@
+driver-y += northbridge.o
+obj-y += northbridgeinit.o
+obj-y += grphinit.o