intel: Use 'FORCEWAKE_ACK_HSW' define over '0x130044'
Change-Id: I1cf87b3c73d8bf8846e5870b19b089f85c299567 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7241 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marc Jones <marc.jones@se-eng.com>
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@ -246,7 +246,7 @@ static void gma_pm_init_pre_vbios(struct device *dev)
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/* Enable Force Wake */
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gtt_write(0x0a180, 1 << 5);
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gtt_write(0x0a188, 0x00010001);
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gtt_poll(0x130044, 1 << 0, 1 << 0);
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gtt_poll(FORCEWAKE_ACK_HSW, 1 << 0, 1 << 0);
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/* GT Settings */
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gtt_write_regs(haswell_gt_setup);
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@ -420,7 +420,7 @@ static void gma_pm_init_post_vbios(struct device *dev)
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/* Disable Force Wake */
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gtt_write(0x0a188, 0x00010000);
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gtt_poll(0x130044, 1 << 0, 0 << 0);
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gtt_poll(FORCEWAKE_ACK_HSW, 1 << 0, 0 << 0);
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gtt_write(0x0a188, 0x00000001);
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}
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@ -42,7 +42,7 @@ struct reg_script haswell_early_init_script[] = {
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/* Enable Force Wake */
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REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0xa180, 0x00000020),
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REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0xa188, 0x00010001),
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REG_RES_POLL32(PCI_BASE_ADDRESS_0, 0x130044, 1, 1, GT_RETRY),
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REG_RES_POLL32(PCI_BASE_ADDRESS_0, FORCEWAKE_ACK_HSW, 1, 1, GT_RETRY),
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/* Enable Counters */
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REG_RES_OR32(PCI_BASE_ADDRESS_0, 0xa248, 0x00000016),
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@ -126,7 +126,7 @@ static const struct reg_script haswell_late_init_script[] = {
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/* Disable Force Wake */
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REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0xa188, 0x00010000),
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REG_RES_POLL32(PCI_BASE_ADDRESS_0, 0x130044, 1, 0, GT_RETRY),
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REG_RES_POLL32(PCI_BASE_ADDRESS_0, FORCEWAKE_ACK_HSW, 1, 0, GT_RETRY),
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REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0xa188, 0x00000001),
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/* Enable power well for DP and Audio */
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@ -140,7 +140,7 @@ static const struct reg_script haswell_late_init_script[] = {
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static const struct reg_script broadwell_early_init_script[] = {
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/* Enable Force Wake */
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REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0xa188, 0x00010001),
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REG_RES_POLL32(PCI_BASE_ADDRESS_0, 0x130044, 1, 1, GT_RETRY),
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REG_RES_POLL32(PCI_BASE_ADDRESS_0, FORCEWAKE_ACK_HSW, 1, 1, GT_RETRY),
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/* Enable push bus metric control and shift */
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REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0xa248, 0x00000004),
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@ -225,7 +225,7 @@ static const struct reg_script broadwell_late_init_script[] = {
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/* Disable Force Wake */
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REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0xa188, 0x00010000),
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REG_RES_POLL32(PCI_BASE_ADDRESS_0, 0x130044, 1, 0, GT_RETRY),
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REG_RES_POLL32(PCI_BASE_ADDRESS_0, FORCEWAKE_ACK_HSW, 1, 0, GT_RETRY),
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/* Enable power well for DP and Audio */
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REG_RES_OR32(PCI_BASE_ADDRESS_0, 0x45400, (1 << 31)),
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