GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/pcengines/apu2/spd: Remove unneeded whitespace 

Change-Id: I0c59cefa4067d3fc01b8425184e10d3caf1c81ac
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/25839
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
This commit is contained in:
Elyes HAOUAS 2018-04-25 23:09:43 +02:00 committed by Patrick Georgi
parent 8b6c2e548b
commit 987f16b28c
2 changed files with 8 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
src/mainboard/pcengines/apu2/spd/HYNIX-2G-1333.spd.hex
View File

@ -44,7 +44,7 @@
00
# 7 Module Organization
# bits[2:0]: 1 = 8 bits
# bits[2:0]: 1 = 8 bits
# bits[2:0]: 2 = 16 bits
# bits[5:3]: 0 = 1 Rank
# bits[7:6]: reserved
@ -103,7 +103,7 @@
30
# 20 Minimum Row Precharge Delay Time (tRPmin)
# 0x6C = 13.5ns -
# 0x6C = 13.5ns -
# 0x69 = 13.125 ns - DDR3-1333
69
@ -190,7 +190,7 @@
86
# 42 - 47 (reserved)
00 00 00 00 00 00
00 00 00 00 00 00
# 48 - 55 (reserved)
00 00 00 00 00 00 00 00
@ -212,7 +212,7 @@
# bits[4:0]: 0 = Reference Raw card A used
# bits[6:5]: 0 = revision 0
# bit7 : 0 = Reference raw cards A through AL
# revision B4
# revision B4
61
# 63 Address Mapping from Edge Connector to DRAM
@ -261,4 +261,3 @@
# 126 - 127: Cyclical Redundancy Code
b6 73

12
src/mainboard/pcengines/apu2/spd/HYNIX-4G-1333-ECC.spd.hex
View File

@ -1,4 +1,4 @@
# HYNIX-4GBYTE-1333 The H9 N0 SPD delivered by Hynix
# HYNIX-4GBYTE-1333 The H9 N0 SPD delivered by Hynix
# SPD contents for APU 4GB DDR3 ECC (1333MHz PC1333) soldered down
# 0 Number of SPD Bytes used / Total SPD Size / CRC Coverage
@ -102,7 +102,7 @@
30
# 20 Minimum Row Precharge Delay Time (tRPmin)
# 0x6C = 13.5ns -
# 0x6C = 13.5ns -
# 0x69 = 13.125 ns - DDR3-1333
69
@ -186,7 +186,7 @@
86
# 42 - 47 (reserved)
00 00 00 00 00 00
00 00 00 00 00 00
# 48 - 55 (reserved)
00 00 00 00 00 00 00 00
@ -208,7 +208,7 @@
# bits[4:0]: 0 = Reference Raw card A used
# bits[6:5]: 0 = revision 0
# bit7 : 0 = Reference raw cards A through AL
# revision B4
# revision B4
61
# 63 Address Mapping from Edge Connector to DRAM
@ -255,7 +255,3 @@
# 126 - 127: Cyclical Redundancy Code
67 94