drivers/intel/fsp2_0: Use coreboot postcar with FSP-T
Allow platforms to use the coreboot postcar code instead of calling into FSP-M TempRamExit API. There are several reasons to do this: - Tearing down CAR is easy. - Allows having control over MTRR's and caching in general. - The MTRR's set up in postcar be it by coreboot or FSP-M are overwritten later on during CPU init so it does not matter. - Avoids having to find a CBFS file before cbmem is up (this causes problems with cbfs_mcache) Change-Id: I6cf10c7580f3183bfee1cd3c827901cbcf695db7 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48466 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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3 changed files with 13 additions and 0 deletions
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@ -126,6 +126,13 @@ config FSP_T_RESERVED_SIZE
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defined in the FSP specification but in the SOC integration
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defined in the FSP specification but in the SOC integration
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guides.
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guides.
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config NO_FSP_TEMP_RAM_EXIT
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bool
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depends on FSP_CAR
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help
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Select this on a platform where you want to use FSP-T but use
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coreboot code to tear down CAR.
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config FSP_M_XIP
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config FSP_M_XIP
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bool
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bool
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default n
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default n
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@ -29,7 +29,9 @@ ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
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ramstage-y += util.c
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ramstage-y += util.c
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ramstage-$(CONFIG_MMA) += mma_core.c
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ramstage-$(CONFIG_MMA) += mma_core.c
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ifneq ($(CONFIG_NO_FSP_TEMP_RAM_EXIT),y)
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postcar-$(CONFIG_FSP_CAR) += temp_ram_exit.c
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postcar-$(CONFIG_FSP_CAR) += temp_ram_exit.c
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endif
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postcar-$(CONFIG_FSP_CAR) += util.c
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postcar-$(CONFIG_FSP_CAR) += util.c
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postcar-$(CONFIG_DISPLAY_FSP_HEADER) += header_display.c
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postcar-$(CONFIG_DISPLAY_FSP_HEADER) += header_display.c
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postcar-y += hand_off_block.c
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postcar-y += hand_off_block.c
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@ -1,6 +1,10 @@
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ifeq ($(CONFIG_FSP_CAR),y)
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ifeq ($(CONFIG_FSP_CAR),y)
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bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU)+= car/cache_as_ram_fsp.S
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bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU)+= car/cache_as_ram_fsp.S
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ifeq ($(CONFIG_NO_FSP_TEMP_RAM_EXIT),y)
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postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += car/exit_car.S
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else
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postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += car/exit_car_fsp.S
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postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += car/exit_car_fsp.S
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endif
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else
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else
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bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/cache_as_ram.S
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bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/cache_as_ram.S
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bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += ../../../../../cpu/x86/early_reset.S
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bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += ../../../../../cpu/x86/early_reset.S
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