GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

OLPC now builds and works just fine. 

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2305 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Ronald G. Minnich 2006-05-15 04:44:15 +00:00
parent b9a335cb9b
commit 98e904ea7c
1 changed files with 14 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

29
src/northbridge/amd/gx2/northbridge.c
View File

@ -70,7 +70,7 @@ sizeram(void)
/* ram has none of this stuff */ /* ram has none of this stuff */
#define RAM_PROPERTIES (0) #define RAM_PROPERTIES (0)
#define DEVICE_PROPERTIES (WRITE_SERIALIZE|CACHE_DISABLE) #define DEVICE_PROPERTIES (WRITE_SERIALIZE|CACHE_DISABLE)
#define ROM_PROPERTIES (WRITE_SERIALIZE|WRITE_THROUGH|CACHE_DISABLE) #define ROM_PROPERTIES (WRITE_SERIALIZE|WRITE_THROUGH)
#define MSR_WS_CD_DEFAULT (0x21212121) #define MSR_WS_CD_DEFAULT (0x21212121)
/* 1810-1817 give you 8 registers with which to program protection regions */ /* 1810-1817 give you 8 registers with which to program protection regions */
@ -138,8 +138,8 @@ setup_gx2_cache(void)
/* set romrp */ /* set romrp */
val = ((unsigned long long) ROM_PROPERTIES) << 56; val = ((unsigned long long) ROM_PROPERTIES) << 56;
/* make rom base useful for 1M roms */ /* make rom base useful for 1M roms */
/* Flash base address -- sized for 1/2M for now*/ /* Flash base address -- sized for 1M for now*/
val |= ((unsigned long long) 0xfff800)<<36; val |= ((unsigned long long) 0xfff00)<<36;
/* set the devrp properties */ /* set the devrp properties */
val |= ((unsigned long long) DEVICE_PROPERTIES) << 28; val |= ((unsigned long long) DEVICE_PROPERTIES) << 28;
/* sigh. Take our TOM, RIGHT shift 12, since it page-aligned, then LEFT-shift 8 for reg. */ /* sigh. Take our TOM, RIGHT shift 12, since it page-aligned, then LEFT-shift 8 for reg. */
@ -176,7 +176,12 @@ setup_gx2(void)
sizem = setup_gx2_cache(); sizem = setup_gx2_cache();
membytes = sizem * 1048576; membytes = sizem * 1048576;
#if 0 /* NOTE! setup_gx2_cache returns the SIZE OF RAM - RAMADJUST!
* so it is safe to use. You should NOT at this point call
* sizeram() directly.
*/
/* we need to set 0x10000028 and 0x40000029 */ /* we need to set 0x10000028 and 0x40000029 */
printk_debug("sizem 0x%x, membytes 0x%x\n", sizem, membytes); printk_debug("sizem 0x%x, membytes 0x%x\n", sizem, membytes);
msr.hi = 0x20000000 | membytes>>24; msr.hi = 0x20000000 | membytes>>24;
@ -190,7 +195,7 @@ setup_gx2(void)
msr = rdmsr(0x40000029); msr = rdmsr(0x40000029);
printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x40000029, msr.hi,msr.lo); printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x40000029, msr.hi,msr.lo);
#if 1
/* fixme: SMM MSR 0x10000026 and 0x400000023 */ /* fixme: SMM MSR 0x10000026 and 0x400000023 */
/* calculate the OFFSET field */ /* calculate the OFFSET field */
tmp = membytes - SMM_OFFSET; tmp = membytes - SMM_OFFSET;
@ -206,22 +211,16 @@ setup_gx2(void)
msr.hi = tmp; msr.hi = tmp;
msr.lo = tmp2; msr.lo = tmp2;
wrmsr(0x10000026, msr); wrmsr(0x10000026, msr);
#else #endif
msr.hi = 0x2000000f; #if 0
msr.lo = 0xfbf00100;
wrmsr(0x10000028, msr);
msr = rdmsr(0x10000028);
printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x10000028, msr.hi, msr.lo);
wrmsr(0x40000029, msr);
msr = rdmsr(0x40000029);
printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x40000029, msr.hi, msr.lo);
msr.hi = 0x2cfbc040; msr.hi = 0x2cfbc040;
msr.lo = 0x400fffc0; msr.lo = 0x400fffc0;
wrmsr(0x10000026, msr); wrmsr(0x10000026, msr);
msr = rdmsr(0x10000026); msr = rdmsr(0x10000026);
printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x10000026, msr.hi, msr.lo); printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x10000026, msr.hi, msr.lo);
#endif
#if 0
msr.hi = 0x22fffc02; msr.hi = 0x22fffc02;
msr.lo = 0x10ffbf00; msr.lo = 0x10ffbf00;
wrmsr(0x1808, msr); wrmsr(0x1808, msr);