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cpu/x86/mp_init: don't wait between INIT and SIPI for X86_AMD_INIT_SIPI 

Since current AMD SoCs don't need some wait time between INIT and SIPI,
we can skip the 10ms wait there, which improves the boot time a bit.

before: CPU_CLUSTER: 0 init finished in 632 msecs
after:  CPU_CLUSTER: 0 init finished in 619 msecs

mpinit still works on Mandolin and all CPU cores show up and are usable.
This also doesn't change the binary in a timeless build for boards/SoCs
that don't select X86_AMD_INIT_SIPI which I verified for lenovo/x230.

BUG=b:193885336

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I1e044776f45021742a88a5e369a74383c1baaab6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56533
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Felix Held 2021-07-21 16:50:10 +02:00
parent 3136424e48
commit 98fb72fa3f
2 changed files with 8 additions and 3 deletions
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4
src/cpu/x86/Kconfig
View File

@ -173,7 +173,9 @@ config X86_AMD_INIT_SIPI
help
This option limits the number of SIPI signals sent during during the
common AP setup. Intel documentation specifies an INIT SIPI SIPI
sequence, however this doesn't work on some AMD platforms.
sequence, however this doesn't work on some AMD platforms. These
newer AMD platforms don't need the 10ms wait between INIT and SIPI,
so skip that too to save some time.
config SOC_SETS_MSRS
bool

7
src/cpu/x86/mp_init.c
View File

@ -449,8 +449,11 @@ static int start_aps(struct bus *cpu_bus, int ap_count, atomic_t *num_aps)
/* Send INIT IPI to all but self. */
lapic_send_ipi(LAPIC_DEST_ALLBUT | LAPIC_INT_ASSERT | LAPIC_DM_INIT, 0);
printk(BIOS_DEBUG, "Waiting for 10ms after sending INIT.\n");
mdelay(10);
if (!CONFIG(X86_AMD_INIT_SIPI)) {
printk(BIOS_DEBUG, "Waiting for 10ms after sending INIT.\n");
mdelay(10);
}
/* Send 1st SIPI */
if (lapic_busy()) {