soc/intel/icelake: Make static IRQ mapping for ICP PCH pci devices
Since PIRQ->IRQ mapping registers PxRC are not available after FSP-S call due to PCH requirement change from CNP PCH onwards, hence making static IRQ mapping for pci_irqs.asl and pcie.asl Also remove unused irqlinks.asl from soc/intel/icelake/acpi/ Change-Id: Idec00c3b8a97cb5aa7b4000840aba914aea478c9 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/29508 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Subrata Banik
parent
c2e4941367
commit
990db2213f
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@ -1,282 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2018 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/*
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* PIRQ routing control is in PCR ITSS region.
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*
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* Due to what appears to be an ACPI interpreter bug we do not use
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* the PCRB() method here as it may not be defined yet because the method
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* definiton depends on the order of the include files in pch.asl.
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*
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* https://bugs.acpica.org/show_bug.cgi?id=1201
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*/
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OperationRegion (ITSS, SystemMemory,
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Add (PCR_ITSS_PIRQA_ROUT,
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Add (CONFIG_PCR_BASE_ADDRESS,
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ShiftLeft (PID_ITSS, PCR_PORTID_SHIFT))), 8)
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Field (ITSS, ByteAcc, NoLock, Preserve)
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{
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PIRA, 8, /* PIRQA Routing Control */
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PIRB, 8, /* PIRQB Routing Control */
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PIRC, 8, /* PIRQC Routing Control */
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PIRD, 8, /* PIRQD Routing Control */
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PIRE, 8, /* PIRQE Routing Control */
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PIRF, 8, /* PIRQF Routing Control */
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PIRG, 8, /* PIRQG Routing Control */
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PIRH, 8, /* PIRQH Routing Control */
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}
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Name (IREN, 0x80) /* Interrupt Routing Enable */
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Name (IREM, 0x0f) /* Interrupt Routing Mask */
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Device (LNKA)
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{
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Name (_HID, EISAID ("PNP0C0F"))
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Name (_UID, 1)
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Method (_CRS, 0, Serialized)
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{
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Name (RTLA, ResourceTemplate ()
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{
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IRQ (Level, ActiveLow, Shared) {11}
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})
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CreateWordField (RTLA, 1, IRQ0)
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Store (Zero, IRQ0)
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/* Set the bit from PIRQ Routing Register */
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ShiftLeft (1, And (^^PIRA, ^^IREM), IRQ0)
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Return (RTLA)
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}
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Method (_STA, 0, Serialized)
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{
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If (And (^^PIRA, ^^IREN)) {
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Return (0x9)
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} Else {
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Return (0xb)
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}
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}
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}
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Device (LNKB)
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{
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Name (_HID, EISAID ("PNP0C0F"))
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Name (_UID, 2)
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Method (_CRS, 0, Serialized)
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{
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Name (RTLB, ResourceTemplate ()
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{
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IRQ (Level, ActiveLow, Shared) {10}
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})
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CreateWordField (RTLB, 1, IRQ0)
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Store (Zero, IRQ0)
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/* Set the bit from PIRQ Routing Register */
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ShiftLeft (1, And (^^PIRB, ^^IREM), IRQ0)
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Return (RTLB)
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}
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Method (_STA, 0, Serialized)
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{
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If (And (^^PIRB, ^^IREN)) {
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Return (0x9)
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} Else {
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Return (0xb)
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}
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}
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}
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Device (LNKC)
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{
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Name (_HID, EISAID ("PNP0C0F"))
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Name (_UID, 3)
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Method (_CRS, 0, Serialized)
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{
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Name (RTLC, ResourceTemplate ()
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{
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IRQ (Level, ActiveLow, Shared) {11}
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})
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CreateWordField (RTLC, 1, IRQ0)
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Store (Zero, IRQ0)
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/* Set the bit from PIRQ Routing Register */
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ShiftLeft (1, And (^^PIRC, ^^IREM), IRQ0)
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Return (RTLC)
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}
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Method (_STA, 0, Serialized)
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{
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If (And (^^PIRC, ^^IREN)) {
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Return (0x9)
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} Else {
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Return (0xb)
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}
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}
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}
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Device (LNKD)
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{
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Name (_HID, EISAID ("PNP0C0F"))
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Name (_UID, 4)
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Method (_CRS, 0, Serialized)
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{
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Name (RTLD, ResourceTemplate ()
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{
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IRQ (Level, ActiveLow, Shared) {11}
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})
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CreateWordField (RTLD, 1, IRQ0)
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Store (Zero, IRQ0)
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/* Set the bit from PIRQ Routing Register */
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ShiftLeft (1, And (^^PIRD, ^^IREM), IRQ0)
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Return (RTLD)
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}
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Method (_STA, 0, Serialized)
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{
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If (And (^^PIRD, ^^IREN)) {
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Return (0x9)
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} Else {
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Return (0xb)
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}
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}
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}
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Device (LNKE)
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{
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Name (_HID, EISAID ("PNP0C0F"))
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Name (_UID, 5)
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Method (_CRS, 0, Serialized)
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{
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Name (RTLE, ResourceTemplate ()
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{
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IRQ (Level, ActiveLow, Shared) {11}
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})
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CreateWordField (RTLE, 1, IRQ0)
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Store (Zero, IRQ0)
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/* Set the bit from PIRQ Routing Register */
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ShiftLeft (1, And (^^PIRE, ^^IREM), IRQ0)
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Return (RTLE)
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}
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Method (_STA, 0, Serialized)
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{
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If (And (^^PIRE, ^^IREN)) {
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Return (0x9)
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} Else {
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Return (0xb)
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}
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}
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}
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Device (LNKF)
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{
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Name (_HID, EISAID ("PNP0C0F"))
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Name (_UID, 6)
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Method (_CRS, 0, Serialized)
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{
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Name (RTLF, ResourceTemplate ()
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{
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IRQ (Level, ActiveLow, Shared) {11}
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})
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CreateWordField (RTLF, 1, IRQ0)
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Store (Zero, IRQ0)
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/* Set the bit from PIRQ Routing Register */
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ShiftLeft (1, And (^^PIRF, ^^IREM), IRQ0)
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Return (RTLF)
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}
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Method (_STA, 0, Serialized)
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{
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If (And (^^PIRF, ^^IREN)) {
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Return (0x9)
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} Else {
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Return (0xb)
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}
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}
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}
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Device (LNKG)
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{
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Name (_HID, EISAID ("PNP0C0F"))
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Name (_UID, 7)
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Method (_CRS, 0, Serialized)
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{
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Name (RTLG, ResourceTemplate ()
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{
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IRQ (Level, ActiveLow, Shared) {11}
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})
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CreateWordField (RTLG, 1, IRQ0)
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Store (Zero, IRQ0)
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/* Set the bit from PIRQ Routing Register */
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ShiftLeft (1, And (^^PIRG, ^^IREM), IRQ0)
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Return (RTLG)
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}
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Method (_STA, 0, Serialized)
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{
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If (And (^^PIRG, ^^IREN)) {
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Return (0x9)
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} Else {
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Return (0xb)
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}
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}
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}
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Device (LNKH)
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{
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Name (_HID, EISAID ("PNP0C0F"))
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Name (_UID, 8)
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Method (_CRS, 0, Serialized)
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{
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Name (RTLH, ResourceTemplate ()
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{
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IRQ (Level, ActiveLow, Shared) {11}
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})
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CreateWordField (RTLH, 1, IRQ0)
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Store (Zero, IRQ0)
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/* Set the bit from PIRQ Routing Register */
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ShiftLeft (1, And (^^PIRH, ^^IREM), IRQ0)
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Return (RTLH)
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}
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Method (_STA, 0, Serialized)
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{
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If (And (^^PIRH, ^^IREN)) {
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Return (0x9)
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} Else {
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Return (0xb)
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}
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}
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}
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@ -84,51 +84,49 @@ Name (PICP, Package () {
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Name (PICN, Package () {
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/* D31: cAVS, SMBus, GbE, Nothpeak */
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Package () { 0x001FFFFF, 0, \_SB.PCI0.LNKA, 0 },
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Package () { 0x001FFFFF, 1, \_SB.PCI0.LNKB, 0 },
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Package () { 0x001FFFFF, 2, \_SB.PCI0.LNKC, 0 },
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Package () { 0x001FFFFF, 3, \_SB.PCI0.LNKD, 0 },
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/* D32: Can't use PIC*/
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Package () { 0x001FFFFF, 0, 0, 11 },
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Package () { 0x001FFFFF, 1, 0, 10 },
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Package () { 0x001FFFFF, 2, 0, 11 },
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Package () { 0x001FFFFF, 3, 0, 11 },
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/* D30: Can't use PIC*/
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/* D29: PCI Express Port 9-16 */
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Package () { 0x001DFFFF, 0, \_SB.PCI0.LNKA, 0 },
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Package () { 0x001DFFFF, 1, \_SB.PCI0.LNKB, 0 },
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Package () { 0x001DFFFF, 2, \_SB.PCI0.LNKC, 0 },
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Package () { 0x001DFFFF, 3, \_SB.PCI0.LNKD, 0 },
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Package () { 0x001DFFFF, 0, 0, 11 },
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Package () { 0x001DFFFF, 1, 0, 10 },
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Package () { 0x001DFFFF, 2, 0, 11 },
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Package () { 0x001DFFFF, 3, 0, 11 },
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/* D28: PCI Express Port 1-8 */
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Package () { 0x001CFFFF, 0, \_SB.PCI0.LNKA, 0 },
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Package () { 0x001CFFFF, 1, \_SB.PCI0.LNKB, 0 },
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Package () { 0x001CFFFF, 2, \_SB.PCI0.LNKC, 0 },
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Package () { 0x001CFFFF, 3, \_SB.PCI0.LNKD, 0 },
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Package () { 0x001CFFFF, 0, 0, 11 },
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Package () { 0x001CFFFF, 1, 0, 10 },
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Package () { 0x001CFFFF, 2, 0, 11 },
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Package () { 0x001CFFFF, 3, 0, 11 },
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/* D26: Can't use PIC*/
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/* D25: Can't use PIC*/
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/* D23 */
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Package () { 0x0017FFFF, 0, \_SB.PCI0.LNKA, 0 },
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/* D23: SATA controller */
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Package () { 0x0017FFFF, 0, 0, 11 },
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/* D22: CSME (HECI, IDE-R, KT redirection */
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Package () { 0x0016FFFF, 0, \_SB.PCI0.LNKA, 0 },
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Package () { 0x0016FFFF, 1, \_SB.PCI0.LNKB, 0 },
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Package () { 0x0016FFFF, 2, \_SB.PCI0.LNKC, 0 },
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Package () { 0x0016FFFF, 3, \_SB.PCI0.LNKD, 0 },
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/* D21: Can't use PIC*/
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Package () { 0x0016FFFF, 0, 0, 11 },
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Package () { 0x0016FFFF, 1, 0, 10 },
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Package () { 0x0016FFFF, 2, 0, 11 },
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Package () { 0x0016FFFF, 3, 0, 11 },
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/* D20: xHCI, OTG, SRAM, CNVi WiFi */
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Package () { 0x0014FFFF, 0, \_SB.PCI0.LNKA, 0 },
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Package () { 0x0014FFFF, 1, \_SB.PCI0.LNKB, 0 },
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Package () { 0x0014FFFF, 2, \_SB.PCI0.LNKC, 0 },
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Package () { 0x0014FFFF, 3, \_SB.PCI0.LNKD, 0 },
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/* D19: Can't use PIC*/
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/* Thermal */
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Package () { 0x0012FFFF, 0, \_SB.PCI0.LNKA, 0 },
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Package () { 0x0014FFFF, 0, 0, 11 },
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Package () { 0x0014FFFF, 1, 0, 10 },
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Package () { 0x0014FFFF, 2, 0, 11 },
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Package () { 0x0014FFFF, 3, 0, 11 },
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/* D18: Can't use PIC*/
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/* P.E.G. Root Port D1F0 */
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Package () { 0x0001FFFF, 0, \_SB.PCI0.LNKA, 0 },
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Package () { 0x0001FFFF, 1, \_SB.PCI0.LNKB, 0 },
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Package () { 0x0001FFFF, 2, \_SB.PCI0.LNKC, 0 },
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Package () { 0x0001FFFF, 3, \_SB.PCI0.LNKD, 0 },
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Package () { 0x0001FFFF, 0, 0, 11 },
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Package () { 0x0001FFFF, 1, 0, 10 },
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Package () { 0x0001FFFF, 2, 0, 11 },
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Package () { 0x0001FFFF, 3, 0, 11 },
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/* SA IGFX Device */
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Package () { 0x0002FFFF, 0, \_SB.PCI0.LNKA, 0 },
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Package () { 0x0002FFFF, 0, 0, 11 },
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/* SA Thermal Device */
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Package () { 0x0004FFFF, 0, \_SB.PCI0.LNKA, 0 },
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Package () { 0x0004FFFF, 0, 0, 11 },
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/* SA IPU Device */
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Package () { 0x0005FFFF, 0, \_SB.PCI0.LNKA, 0 },
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Package () { 0x0005FFFF, 0, 0, 11 },
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/* SA GNA Device */
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Package () { 0x0008FFFF, 0, \_SB.PCI0.LNKA, 0 },
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Package () { 0x0008FFFF, 0, 0, 11 },
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})
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Method (_PRT)
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@ -24,10 +24,10 @@ Method (IRQM, 1, Serialized) {
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Package () { 0x0000ffff, 2, 0, 18 },
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Package () { 0x0000ffff, 3, 0, 19 } })
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Name (IQAP, Package () {
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Package () { 0x0000ffff, 0, \_SB.PCI0.LNKA, 0 },
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Package () { 0x0000ffff, 1, \_SB.PCI0.LNKB, 0 },
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Package () { 0x0000ffff, 2, \_SB.PCI0.LNKC, 0 },
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Package () { 0x0000ffff, 3, \_SB.PCI0.LNKD, 0 } })
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Package () { 0x0000ffff, 0, 0, 11 },
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Package () { 0x0000ffff, 1, 0, 10 },
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Package () { 0x0000ffff, 2, 0, 11 },
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Package () { 0x0000ffff, 3, 0, 11 } })
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/* Interrupt Map INTA->INTB, INTB->INTC, INTC->INTD, INTD->INTA */
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Name (IQBA, Package () {
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@ -36,10 +36,10 @@ Method (IRQM, 1, Serialized) {
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Package () { 0x0000ffff, 2, 0, 19 },
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Package () { 0x0000ffff, 3, 0, 16 } })
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Name (IQBP, Package () {
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Package () { 0x0000ffff, 0, \_SB.PCI0.LNKB, 0 },
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Package () { 0x0000ffff, 1, \_SB.PCI0.LNKC, 0 },
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Package () { 0x0000ffff, 2, \_SB.PCI0.LNKD, 0 },
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Package () { 0x0000ffff, 3, \_SB.PCI0.LNKA, 0 } })
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Package () { 0x0000ffff, 0, 0, 10 },
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Package () { 0x0000ffff, 1, 0, 11 },
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Package () { 0x0000ffff, 2, 0, 11 },
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Package () { 0x0000ffff, 3, 0, 11 } })
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/* Interrupt Map INTA->INTC, INTB->INTD, INTC->INTA, INTD->INTB */
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Name (IQCA, Package () {
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@ -48,10 +48,10 @@ Method (IRQM, 1, Serialized) {
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Package () { 0x0000ffff, 2, 0, 16 },
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Package () { 0x0000ffff, 3, 0, 17 } })
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Name (IQCP, Package () {
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Package () { 0x0000ffff, 0, \_SB.PCI0.LNKC, 0 },
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Package () { 0x0000ffff, 1, \_SB.PCI0.LNKD, 0 },
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Package () { 0x0000ffff, 2, \_SB.PCI0.LNKA, 0 },
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Package () { 0x0000ffff, 3, \_SB.PCI0.LNKB, 0 } })
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Package () { 0x0000ffff, 0, 0, 11 },
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Package () { 0x0000ffff, 1, 0, 11 },
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Package () { 0x0000ffff, 2, 0, 11 },
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Package () { 0x0000ffff, 3, 0, 10 } })
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/* Interrupt Map INTA->INTD, INTB->INTA, INTC->INTB, INTD->INTC */
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Name (IQDA, Package () {
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@ -60,10 +60,10 @@ Method (IRQM, 1, Serialized) {
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Package () { 0x0000ffff, 2, 0, 17 },
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Package () { 0x0000ffff, 3, 0, 18 } })
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Name (IQDP, Package () {
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Package () { 0x0000ffff, 0, \_SB.PCI0.LNKD, 0 },
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Package () { 0x0000ffff, 1, \_SB.PCI0.LNKA, 0 },
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Package () { 0x0000ffff, 2, \_SB.PCI0.LNKB, 0 },
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Package () { 0x0000ffff, 3, \_SB.PCI0.LNKC, 0 } })
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Package () { 0x0000ffff, 0, 0, 11 },
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Package () { 0x0000ffff, 1, 0, 11 },
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Package () { 0x0000ffff, 2, 0, 10 },
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Package () { 0x0000ffff, 3, 0, 11 } })
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Switch (ToInteger (Arg0))
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{
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@ -20,9 +20,6 @@
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#include <soc/itss.h>
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#include <soc/pcr_ids.h>
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/* Interrupt Routing */
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#include "irqlinks.asl"
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/* PCI IRQ assignment */
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#include "pci_irqs.asl"
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Reference in New Issue