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Fix the indent and whitespace to match LinuxBIOS standards 

Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2650 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Jordan Crouse 2007-05-10 18:32:28 +00:00 committed by Stefan Reinauer
parent f8030bd924
commit 9934b813da
5 changed files with 388 additions and 449 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
src/cpu/amd/model_lx/cpubug.c
View File

@ -30,7 +30,6 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/lxdef.h>
/**************************************************************************
*
* pcideadlock
@ -40,7 +39,8 @@
* There is also fix code in cache and PCI functions. This bug is very is pervasive.
*
**************************************************************************/
static void pcideadlock(void){
static void pcideadlock(void)
{
msr_t msr;
/*
@ -52,7 +52,6 @@ static void pcideadlock(void){
msr.lo |= DM_CONFIG0_LOWER_MISSER_SET;
wrmsr(CPU_DM_CONFIG0, msr);
/* write serialize memory hole to PCI. Need to unWS when something is
* shadowed regardless of cachablility.
*/
@ -74,7 +73,8 @@ static void pcideadlock(void){
/** to maintain coherency with and the cache is not enabled yet.*/
/***/
/****************************************************************************/
static void disablememoryreadorder(void){
static void disablememoryreadorder(void)
{
msr_t msr;
msr = rdmsr(MC_CF8F_DATA);
@ -83,7 +83,8 @@ static void disablememoryreadorder(void){
}
/* For cpu version C3. Should be the only released version */
void cpubug(void) {
void cpubug(void)
{
pcideadlock();
disablememoryreadorder();
printk_debug("Done cpubug fixes \n");

75
src/cpu/amd/model_lx/cpureginit.c
View File

@ -25,7 +25,8 @@
;* SetDelayControl
;*
;*************************************************************************/
void SetDelayControl(void){
void SetDelayControl(void)
{
unsigned int msrnum, glspeed;
unsigned char spdbyte0, spdbyte1;
msr_t msr;
@ -59,7 +60,6 @@ void SetDelayControl(void){
msr.lo = 0x00000001;
wrmsr(msrnum, msr);
/* Debug Delay Control Setup Check
Leave it alone if it has been setup. FS2 or something is here. */
msrnum = GLCP_DELAY_CONTROLS;
@ -68,30 +68,27 @@ void SetDelayControl(void){
return;
}
/*
; Delay Controls based on DIMM loading. UGH!
; # of Devices = Module Width (SPD6) / Device Width(SPD13) * Physical Banks(SPD5)
; Note - We only support module width of 64.
* Delay Controls based on DIMM loading. UGH!
* # of Devices = Module Width (SPD6) / Device Width(SPD13) * Physical Banks(SPD5)
* Note - We only support module width of 64.
*/
spdbyte0 = spd_read_byte(DIMM0, SPD_PRIMARY_SDRAM_WIDTH);
if (spdbyte0 != 0xFF) {
spdbyte0 = (unsigned char) 64/spdbyte0 * (unsigned char) (spd_read_byte(DIMM0, SPD_NUM_DIMM_BANKS));
}
else{
spdbyte0 = (unsigned char)64 / spdbyte0 *
(unsigned char)(spd_read_byte(DIMM0, SPD_NUM_DIMM_BANKS));
} else {
spdbyte0 = 0;
}
spdbyte1 = spd_read_byte(DIMM1, SPD_PRIMARY_SDRAM_WIDTH);
if (spdbyte1 != 0xFF) {
spdbyte1 = (unsigned char) 64/spdbyte1 * (unsigned char) (spd_read_byte(DIMM1, SPD_NUM_DIMM_BANKS));
}
else{
spdbyte1 = (unsigned char)64 / spdbyte1 *
(unsigned char)(spd_read_byte(DIMM1, SPD_NUM_DIMM_BANKS));
} else {
spdbyte1 = 0;
}
/* The current thinking. Subject to change...
; "FUTURE ROBUSTNESS" PROPOSAL
@ -152,36 +149,30 @@ void SetDelayControl(void){
if (glspeed < 334) {
msr.hi |= 0x0837100AA;
msr.lo |= 0x056960004;
}
else{
} else {
msr.hi |= 0x082710055;
msr.lo |= 0x056960004;
}
}
else if (spdbyte0 > 4){
} else if (spdbyte0 > 4) {
/* medium dimm */
if (glspeed < 334) {
msr.hi |= 0x0837100AA;
msr.lo |= 0x056960004;
}
else{
} else {
msr.hi |= 0x0827100AA;
msr.lo |= 0x056960004;
}
}
else{
} else {
/* small dimm */
if (glspeed < 334) {
msr.hi |= 0x0837100FF;
msr.lo |= 0x056960004;
}
else{
} else {
msr.hi |= 0x0827100FF;
msr.lo |= 0x056960004;
}
}
}
else{
} else {
/* two dimm solution */
spdbyte0 += spdbyte1;
if (spdbyte0 > 24) {
@ -189,41 +180,34 @@ void SetDelayControl(void){
if (glspeed < 334) {
msr.hi |= 0x0B37100A5;
msr.lo |= 0x056960004;
}
else{
} else {
msr.hi |= 0x0B2710000;
msr.lo |= 0x056960004;
}
}
else if (spdbyte0 > 16){
} else if (spdbyte0 > 16) {
/* large dimms */
if (glspeed < 334) {
msr.hi |= 0x0B37100A5;
msr.lo |= 0x056960004;
}
else{
} else {
msr.hi |= 0x0B27100A5;
msr.lo |= 0x056960004;
}
}
else if (spdbyte0 >= 8){
} else if (spdbyte0 >= 8) {
/* medium dimms */
if (glspeed < 334) {
msr.hi |= 0x0937100A5;
msr.lo |= 0x056960004;
}
else{
} else {
msr.hi |= 0x0C27100A5;
msr.lo |= 0x056960004;
}
}
else{
} else {
/* small dimms */
if (glspeed < 334) {
msr.hi |= 0x0837100A5;
msr.lo |= 0x056960004;
}
else{
} else {
msr.hi |= 0x082710000;
msr.lo |= 0x056960004;
}
@ -236,8 +220,8 @@ void SetDelayControl(void){
/* ***************************************************************************/
/* * cpuRegInit*/
/* ***************************************************************************/
void
cpuRegInit (void){
void cpuRegInit(void)
{
int msrnum;
msr_t msr;
@ -279,14 +263,12 @@ cpuRegInit (void){
msr.lo |= SMM_INST_EN_SET;
wrmsr(msrnum, msr);
/* FPU imprecise exceptions bit */
msrnum = CPU_FPU_MSR_MODE;
msr = rdmsr(msrnum);
msr.lo |= FPU_IE_SET;
wrmsr(msrnum, msr);
/* Power Savers (Do after BIST) */
/* Enable Suspend on HLT & PAUSE instructions */
msrnum = CPU_XC_CONFIG;
@ -304,11 +286,12 @@ cpuRegInit (void){
/* Disable the debug clock to save power. */
/* NOTE: leave it enabled for fs2 debug */
/* msrnum = GLCP_DBGCLKCTL;
#if 0
msrnum = GLCP_DBGCLKCTL;
msr.hi = 0;
msr.lo = 0;
wrmsr(msrnum, msr);
*/
#endif
/* Setup throttling delays to proper mode if it is ever enabled. */
msrnum = GLCP_TH_OD;

7
src/cpu/amd/model_lx/model_lx_init.c
View File

@ -33,12 +33,9 @@
static void vsm_end_post_smi(void)
{
__asm__ volatile (
"push %ax\n"
__asm__ volatile ("push %ax\n"
"mov $0x5000, %ax\n"
".byte 0x0f, 0x38\n"
"pop %ax\n"
);
".byte 0x0f, 0x38\n" "pop %ax\n");
}
static void model_lx_init(device_t dev)

8
src/cpu/amd/model_lx/syspreinit.c
View File

@ -29,14 +29,14 @@
/* * Destroys: Al,*/
/* **/
/* ***************************************************************************/
void
StartTimer1(void){
void StartTimer1(void)
{
outb(0x56, 0x43);
outb(0x12, 0x41);
}
void
SystemPreInit(void){
void SystemPreInit(void)
{
/* they want a jump ... */
#ifndef USE_DCACHE_RAM

96
src/cpu/amd/model_lx/vsmsetup.c
View File

@ -89,48 +89,39 @@ __asm__ (
"gdtarg: \n"
" .word gdt_limit \n"
" .long gdt \n"
/* compute the table limit */
"__mygdt_limit = __mygdt_end - __mygdt - 1 \n"
"__mygdtaddr: \n"
" .word __mygdt_limit \n"
" .long __mygdt \n"
"__mygdt: \n"
/* selgdt 0, unused */
" .word 0x0000, 0x0000 \n"
" .byte 0x00, 0x00, 0x00, 0x00 \n"
/* selgdt 8, unused */
" .word 0x0000, 0x0000 \n"
" .byte 0x00, 0x00, 0x00, 0x00 \n"
/* selgdt 0x10, flat code segment */
" .word 0xffff, 0x0000 \n"
" .byte 0x00, 0x9b, 0xcf, 0x00 \n"
/* selgdt 0x18, flat data segment */
" .word 0xffff, 0x0000 \n"
" .byte 0x00, 0x93, 0xcf, 0x00 \n"
/* selgdt 0x20, unused */
" .word 0x0000, 0x0000 \n"
" .byte 0x00, 0x00, 0x00, 0x00 \n"
/* selgdt 0x28 16-bit 64k code at 0x00000000 */
" .word 0xffff, 0x0000 \n"
" .byte 0, 0x9a, 0, 0 \n"
/* selgdt 0x30 16-bit 64k data at 0x00000000 */
" .word 0xffff, 0x0000 \n"
" .byte 0, 0x92, 0, 0 \n"
"__mygdt_end: \n"
);
/* Declare a pointer to where our idt is going to be i.e. at mem zero */
__asm__ ("__myidt: \n"
__asm__(
"__myidt: \n"
/* 16-bit limit */
" .word 1023 \n"
/* 24-bit base */
@ -151,29 +142,25 @@ static void real_mode_switch_call_vsm(unsigned long smm, unsigned long sysm)
/* save the stack */
" mov %%esp, __stack \n"
" jmp 1f \n"
"__stack: .long 0 \n"
"1:\n"
"__stack: .long 0 \n" "1:\n"
/* get devfn into %%ecx */
" movl %%esp, %%ebp \n"
#if 0
/* I'm not happy about that pushal followed by esp-relative references.
* just do hard-codes for now
/* I'm not happy about that pushal followed by esp-relative
* references. Just do hard-codes for now
*/
" movl 8(%%ebp), %%ecx \n"
" movl 12(%%ebp), %%edx \n"
#endif
" movl %0, %%ecx \n"
" movl %1, %%edx \n"
/* load 'our' gdt */
" lgdt %%cs:__mygdtaddr \n"
/* This configures CS properly for real mode. */
" ljmp $0x28, $__rms_16bit\n"
"__rms_16bit: \n"
" .code16 \n"
/* 16 bit code from here on... */
/* Load the segment registers w/ properly configured segment
* descriptors. They will retain these configurations (limits,
* writability, etc.) once protected mode is turned off. */
@ -183,30 +170,28 @@ static void real_mode_switch_call_vsm(unsigned long smm, unsigned long sysm)
" mov %%ax, %%fs \n"
" mov %%ax, %%gs \n"
" mov %%ax, %%ss \n"
/* Turn off protection (bit 0 in CR0) */
" movl %%cr0, %%eax \n"
" andl $0xFFFFFFFE, %%eax \n"
" movl %%eax, %%cr0 \n"
/* Now really going into real mode */
" ljmp $0, $__rms_real\n"
"__rms_real: \n"
/* put the stack at the end of page zero.
* that way we can easily share it between real and protected,
* since the 16-bit ESP at segment 0 will work for any case. */
* since the 16-bit ESP at segment 0 will work for any case.
*/
/* Setup a stack */
" mov $0x0, %%ax \n"
" mov %%ax, %%ss \n"
" movl $0x1000, %%eax \n"
" movl %%eax, %%esp \n"
/* Load our 16 it idt */
" xor %%ax, %%ax \n"
" mov %%ax, %%ds \n"
" lidt __myidt \n"
/* Dump zeros in the other segregs */
" mov %%ax, %%es \n"
/* FixMe: Big real mode for gs, fs? */
@ -217,16 +202,13 @@ static void real_mode_switch_call_vsm(unsigned long smm, unsigned long sysm)
//" mov %%cx, %%ax \n"
" movl %0, %%ecx \n"
" movl %1, %%edx \n"
/* call the VSA2 entry point address */
" lcall %2, %3\n"
/* if we got here, just about done.
* Need to get back to protected mode */
" movl %%cr0, %%eax \n"
" orl $0x0000001, %%eax\n" /* PE = 1 */
" movl %%eax, %%cr0 \n"
/* Now that we are in protected mode jump to a 32 bit code segment. */
" data32 ljmp $0x10, $vsmrestart\n"
"vsmrestart:\n"
@ -237,16 +219,15 @@ static void real_mode_switch_call_vsm(unsigned long smm, unsigned long sysm)
" mov %%ax, %%fs \n"
" mov %%ax, %%gs \n"
" mov %%ax, %%ss \n"
/* restore proper gdt and idt */
" lgdt %%cs:gdtarg \n"
" lidt idtarg \n"
".globl vsm_exit \n"
"vsm_exit: \n"
" mov __stack, %%esp \n"
" popal \n"
:: "g" (smm), "g" (sysm), "g" (entryHi), "g" (entryLo));
" popal \n"::
"g" (smm), "g"(sysm), "g"(entryHi), "g"(entryLo)
);
}
__asm__(".text\n" "real_mode_switch_end:\n");
@ -258,13 +239,11 @@ uint32_t VSA_vrRead(uint16_t classIndex)
{
unsigned eax, ebx, ecx, edx;
asm volatile (
"movw $0x0AC1C, %%dx \n"
"orl $0x0FC530000, %%eax \n"
"outl %%eax, %%dx \n"
"addb $2, %%dl \n"
"inw %%dx, %%ax \n"
: "=a" (eax), "=b"(ebx), "=c"(ecx), "=d"(edx)
: "a"(classIndex)
);
@ -276,13 +255,11 @@ uint32_t VSA_msrRead(uint32_t msrAddr)
{
unsigned eax, ebx, ecx, edx;
asm volatile (
"movw $0x0AC1C, %%dx \n"
"movl $0x0FC530007, %%eax \n"
"outl %%eax, %%dx \n"
"addb $2, %%dl \n"
"inw %%dx, %%ax \n"
: "=a" (eax), "=b"(ebx), "=c"(ecx), "=d"(edx)
: "c"(msrAddr)
);
@ -312,13 +289,8 @@ void do_vsmbios(void)
/* this is the base of rom on the LX at present. At some point, this has to be
* much better parameterized
*/
//rom = 0xfff80000;
//rom = 0xfffc0000;
/* the VSA starts at the base of rom - 64 */
//rom = ((unsigned long) 0) - (ROM_SIZE + 64*1024);
//rom = 0xfffc8000;
//VSA is cat onto the end after LB builds
rom = ((unsigned long)0) - (ROM_SIZE + 36 * 1024);
buf = (unsigned char *)VSA2_BUFFER;
@ -336,11 +308,6 @@ void do_vsmbios(void)
return;
}
//memcpy((void *) VSA2_BUFFER, buf, size);
//for (i = 0; i < 0x800000; i++)
// outb(0xaa, 0x80);
/* ecx gets smm, edx gets sysm */
printk_err("Call real_mode_switch_call_vsm\n");
real_mode_switch_call_vsm(MSR_GLIU0_SMM, MSR_GLIU0_SYSMEM);
@ -352,10 +319,11 @@ void do_vsmbios(void)
// check that VSA is running OK
if (VSA_vrRead(SIGNATURE) == VSA2_SIGNATURE)
printk_debug("do_vsmbios: VSA2 VR signature verified\n");
else printk_err("do_vsmbios: VSA2 VR signature not valid, install failed!\n");
else
printk_err
("do_vsmbios: VSA2 VR signature not valid, install failed!\n");
}
// we had hoped to avoid this.
// this is a stub IDT only. It's main purpose is to ignore calls
// to the BIOS.
@ -421,8 +389,7 @@ void callbiosint(void)
"callbiosint16: \n"
" push %ds \n"
" push %es \n"
" push %fs \n"
" push %gs \n"
" push %fs \n" " push %gs \n"
// clean up the int #. To save space we put it in the lower
// byte. But the top 24 bits are junk.
" andl $0xff, %eax\n"
@ -461,16 +428,13 @@ void callbiosint(void)
" mov %ax, %fs\n"
" mov %ax, %gs\n"
" mov %ax, %ss\n"
/* Turn off protection (bit 0 in CR0) */
" movl %cr0, %eax \n"
" andl $0xFFFFFFFE, %eax \n"
" movl %eax, %cr0 \n"
/* Now really going into real mode */
" ljmp $0, $__rms_real2 \n"
"__rms_real2: \n"
/* Setup a stack
* FixME: where is esp? */
/* no need for a fix here. The esp is shared from 32-bit and 16-bit mode.
@ -479,23 +443,19 @@ void callbiosint(void)
*/
" mov $0x0, %ax \n"
" mov %ax, %ss \n"
/* debugging for RGM */
" mov $0x11, %al \n"
" outb %al, $0x80 \n"
/* Load our 16 bit idt */
" xor %ax, %ax \n"
" mov %ax, %ds \n"
" lidt __myidt \n"
/* Dump zeros in the other segregs */
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
" mov $0x40, %ax \n"
" mov %ax, %ds \n"
/* pop the INT # that you pushed earlier */
" popl %eax \n"
" pop %gs \n"
@ -504,8 +464,7 @@ void callbiosint(void)
" pop %ds \n"
" popal \n"
" iret \n"
" .code32 \n"
);
" .code32 \n");
}
enum {
@ -519,8 +478,8 @@ int pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
int handleint21(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
unsigned long *pesp, unsigned long *pebx, unsigned long *pedx,
unsigned long *pecx, unsigned long *peax, unsigned long *pflags
);
unsigned long *pecx, unsigned long *peax,
unsigned long *pflags);
int biosint(unsigned long intnumber,
unsigned long gsfs, unsigned long dses,
@ -581,8 +540,7 @@ int biosint(unsigned long intnumber,
&ebx, &edx, &ecx, &eax, &flags);
break;
default:
printk_info("BIOSINT: Unsupport int #0x%x\n",
intnumber);
printk_info("BIOSINT: Unsupport int #0x%x\n", intnumber);
break;
}
if (ret)
@ -593,7 +551,6 @@ int biosint(unsigned long intnumber,
return ret;
}
void setup_realmode_idt(void)
{
extern unsigned char idthandle, end_idthandle;
@ -640,8 +597,6 @@ void setup_realmode_idt(void)
memcpy((void *)16384, &debughandle, &end_debughandle - &debughandle);
}
enum {
CHECK = 0xb001,
FINDDEV = 0xb102,
@ -705,7 +660,8 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
// devfn is an int, so we mask it off.
busdevfn = (dev->bus->secondary << 8)
| (dev->path.u.pci.devfn & 0xff);
printk_debug("0x%x: return 0x%x\n", func, busdevfn);
printk_debug("0x%x: return 0x%x\n", func,
busdevfn);
*pebx = busdevfn;
retval = 0;
} else {
@ -731,7 +687,9 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
reg = *pedi;
dev = dev_find_slot(bus, devfn);
if (!dev) {
printk_debug("0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn);
printk_debug
("0x%x: BAD DEVICE bus %d devfn 0x%x\n",
func, bus, devfn);
// idiots. the pcibios guys assumed you'd never pass a bad bus/devfn!
*peax = PCIBIOS_BADREG;
retval = -1;
@ -765,7 +723,8 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
if (retval)
retval = PCIBIOS_BADREG;
printk_debug("0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n",
printk_debug
("0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n",
func, bus, devfn, reg, *pecx);
*peax = 0;
retval = 0;
@ -785,8 +744,7 @@ int handleint21(unsigned long *edi, unsigned long *esi, unsigned long *ebp,
{
int res = -1;
printk_debug("handleint21, eax 0x%x\n", *eax);
switch(*eax&0xffff)
{
switch (*eax & 0xffff) {
case 0x5f19:
break;
case 0x5f18: