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lib/coreboot_table: Simplify API to set up lb_serial 

Instead of having callbacks into serial console code to set up the
coreboot table have the coreboot table code call IP specific code to get
serial information. This makes it easier to reuse the information as the
return value can be used in a different context (e.g. when filling in a
FDT).

This also removes boilerplate code to set up lb_console entries by
setting entry based on the type in struct lb_uart.

Change-Id: I6c08a88fb5fc035eb28d0becf19471c709c8043d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68768
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
This commit is contained in:
Arthur Heymans 2022-10-24 14:37:40 +02:00 committed by Felix Held
parent 5c38b234ef
commit 9948c521a6
19 changed files with 123 additions and 170 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
src/drivers/uart/pl011.c
View File

@ -35,15 +35,13 @@ unsigned char uart_rx_byte(unsigned int idx)
return read8(&regs->dr);
}
void uart_fill_lb(void *data)
enum cb_err fill_lb_serial(struct lb_serial *serial)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = get_uart_baudrate();
serial.regwidth = 1;
serial.input_hertz = uart_platform_refclk();
lb_add_serial(&serial, data);
serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial->baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial->baud = get_uart_baudrate();
serial->regwidth = 1;
serial->input_hertz = uart_platform_refclk();
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
return CB_SUCCESS;
}

3
src/drivers/uart/sifive.c
View File

@ -100,7 +100,8 @@ unsigned int uart_input_clock_divider(void)
return 1;
}
void uart_fill_lb(void *data)
enum cb_err fill_lb_serial(struct lb_serial *serial)
{
return CB_ERR;
/* TODO */
}

16
src/drivers/uart/uart8250io.c
View File

@ -109,15 +109,13 @@ void uart_tx_flush(unsigned int idx)
uart8250_tx_flush(uart_platform_base(idx));
}
void uart_fill_lb(void *data)
enum cb_err fill_lb_serial(struct lb_serial *serial)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_IO_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = get_uart_baudrate();
serial.regwidth = 1;
serial.input_hertz = uart_platform_refclk();
lb_add_serial(&serial, data);
serial->type = LB_SERIAL_TYPE_IO_MAPPED;
serial->baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial->baud = get_uart_baudrate();
serial->regwidth = 1;
serial->input_hertz = uart_platform_refclk();
lb_add_console(LB_TAG_CONSOLE_SERIAL8250, data);
return CB_SUCCESS;
}

22
src/drivers/uart/uart8250mem.c
View File

@ -133,20 +133,18 @@ void uart_tx_flush(unsigned int idx)
uart8250_mem_tx_flush(base);
}
void uart_fill_lb(void *data)
enum cb_err fill_lb_serial(struct lb_serial *serial)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
if (!serial.baseaddr)
return;
serial.baud = get_uart_baudrate();
serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial->baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
if (!serial->baseaddr)
return CB_ERR;
serial->baud = get_uart_baudrate();
if (CONFIG(DRIVERS_UART_8250MEM_32))
serial.regwidth = sizeof(uint32_t);
serial->regwidth = sizeof(uint32_t);
else
serial.regwidth = sizeof(uint8_t);
serial.input_hertz = uart_platform_refclk();
lb_add_serial(&serial, data);
serial->regwidth = sizeof(uint8_t);
serial->input_hertz = uart_platform_refclk();
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
return CB_SUCCESS;
}

3
src/include/boot/coreboot_tables.h
View File

@ -19,8 +19,7 @@ void fill_lb_gpios(struct lb_gpios *gpios);
void lb_add_gpios(struct lb_gpios *gpios, const struct lb_gpio *gpio_table,
size_t count);
void uart_fill_lb(void *data);
void lb_add_serial(struct lb_serial *serial, void *data);
enum cb_err fill_lb_serial(struct lb_serial *serial);
void lb_add_console(uint16_t consoletype, void *data);
enum cb_err lb_fill_pcie(struct lb_pcie *pcie);

27
src/lib/coreboot_table.c
View File

@ -96,19 +96,22 @@ static struct lb_memory *lb_memory(struct lb_header *header)
return mem;
}
void lb_add_serial(struct lb_serial *new_serial, void *data)
static void lb_add_serial(struct lb_header *header)
{
struct lb_header *header = (struct lb_header *)data;
struct lb_serial *serial;
struct lb_serial new_serial = { .tag = LB_TAG_SERIAL,
.size = sizeof(struct lb_serial),
};
if (fill_lb_serial(&new_serial) != CB_SUCCESS)
return;
serial = (struct lb_serial *)lb_new_record(header);
serial->tag = LB_TAG_SERIAL;
serial->size = sizeof(*serial);
serial->type = new_serial->type;
serial->baseaddr = new_serial->baseaddr;
serial->baud = new_serial->baud;
serial->regwidth = new_serial->regwidth;
serial->input_hertz = new_serial->input_hertz;
struct lb_serial *serial = (struct lb_serial *)lb_new_record(header);
memcpy(serial, &new_serial, sizeof(*serial));
assert(serial->type == LB_SERIAL_TYPE_IO_MAPPED
|| serial->type == LB_SERIAL_TYPE_MEMORY_MAPPED)
if (serial->type == LB_SERIAL_TYPE_IO_MAPPED)
lb_add_console(LB_TAG_CONSOLE_SERIAL8250, header);
else
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, header);
}
void lb_add_console(uint16_t consoletype, void *data)
@ -492,7 +495,7 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end)
/* Record the serial ports and consoles */
if (CONFIG(CONSOLE_SERIAL))
uart_fill_lb(head);
lb_add_serial(head);
if (CONFIG(CONSOLE_USB))
lb_add_console(LB_TAG_CONSOLE_EHCI, head);

17
src/mainboard/emulation/qemu-power8/uart.c
View File

@ -28,16 +28,13 @@ void uart_tx_flush(unsigned int idx)
{
}
void uart_fill_lb(void *data)
enum cb_err fill_lb_serial(struct lb_serial *serial)
{
struct lb_serial serial;
serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial->baseaddr = 0;
serial->baud = 115200;
serial->regwidth = 1;
serial->input_hertz = uart_platform_refclk();
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = 0;
serial.baud = 115200;
serial.regwidth = 1;
serial.input_hertz = uart_platform_refclk();
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
return CB_SUCCESS;
}

16
src/soc/mediatek/common/uart.c
View File

@ -159,15 +159,13 @@ void uart_tx_flush(unsigned int idx)
mtk_uart_tx_flush();
}
void uart_fill_lb(void *data)
enum cb_err fill_lb_serial(struct lb_serial *serial)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = UART0_BASE;
serial.baud = get_uart_baudrate();
serial.regwidth = 4;
serial.input_hertz = UART_HZ;
lb_add_serial(&serial, data);
serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial->baseaddr = UART0_BASE;
serial->baud = get_uart_baudrate();
serial->regwidth = 4;
serial->input_hertz = UART_HZ;
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
return CB_SUCCESS;
}

16
src/soc/nvidia/tegra124/uart.c
View File

@ -114,15 +114,13 @@ void uart_tx_flush(unsigned int idx)
tegra124_uart_tx_flush(uart_ptr);
}
void uart_fill_lb(void *data)
enum cb_err fill_lb_serial(struct lb_serial *serial)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = get_uart_baudrate();
serial.regwidth = 4;
serial.input_hertz = uart_platform_refclk();
lb_add_serial(&serial, data);
serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial->baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial->baud = get_uart_baudrate();
serial->regwidth = 4;
serial->input_hertz = uart_platform_refclk();
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
return CB_SUCCESS;
}

16
src/soc/nvidia/tegra210/uart.c
View File

@ -101,15 +101,13 @@ unsigned char uart_rx_byte(unsigned int idx)
return tegra210_uart_rx_byte();
}
void uart_fill_lb(void *data)
enum cb_err fill_lb_serial(struct lb_serial *serial)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = CONFIG_CONSOLE_SERIAL_TEGRA210_UART_ADDRESS;
serial.baud = get_uart_baudrate();
serial.regwidth = 4;
serial.input_hertz = uart_platform_refclk();
lb_add_serial(&serial, data);
serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial->baseaddr = CONFIG_CONSOLE_SERIAL_TEGRA210_UART_ADDRESS;
serial->baud = get_uart_baudrate();
serial->regwidth = 4;
serial->input_hertz = uart_platform_refclk();
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
return CB_SUCCESS;
}

16
src/soc/qualcomm/common/qupv3_uart.c
View File

@ -140,15 +140,13 @@ uintptr_t uart_platform_base(unsigned int idx)
return (uintptr_t)qup[idx].regs;
}
void uart_fill_lb(void *data)
enum cb_err fill_lb_serial(struct lb_serial *serial)
{
struct lb_serial serial = {0};
serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial->baseaddr = (uint32_t)uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial->baud = get_uart_baudrate();
serial->regwidth = 4;
serial->input_hertz = SRC_XO_HZ;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = (uint32_t)uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = get_uart_baudrate();
serial.regwidth = 4;
serial.input_hertz = SRC_XO_HZ;
lb_add_serial(&serial, data);
return CB_SUCCESS;
}

4
src/soc/qualcomm/common/uart_bitbang.c
View File

@ -5,9 +5,9 @@
#include <boot/coreboot_tables.h>
#include <soc/uart.h>
void uart_fill_lb(void *data)
enum cb_err fill_lb_serial(struct lb_serial *serial)
{
return CB_ERR;
}
static void set_tx(int line_state)

17
src/soc/qualcomm/ipq40xx/uart.c
View File

@ -256,16 +256,13 @@ uint8_t uart_rx_byte(unsigned int idx)
}
/* TODO: Implement function */
void uart_fill_lb(void *data)
enum cb_err fill_lb_serial(struct lb_serial *serial)
{
struct lb_serial serial;
serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial->baseaddr = (uint32_t)UART1_DM_BASE;
serial->baud = get_uart_baudrate();
serial->regwidth = 1;
serial->input_hertz = uart_platform_refclk();
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = (uint32_t)UART1_DM_BASE;
serial.baud = get_uart_baudrate();
serial.regwidth = 1;
serial.input_hertz = uart_platform_refclk();
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
return CB_SUCCESS;
}

3
src/soc/qualcomm/ipq806x/uart.c
View File

@ -368,6 +368,7 @@ uint8_t uart_rx_byte(unsigned int idx)
}
/* TODO: Implement function */
void uart_fill_lb(void *data)
enum cb_err fill_lb_serial(struct lb_serial *serial)
{
return CB_ERR;
}

17
src/soc/qualcomm/qcs405/uart.c
View File

@ -257,16 +257,13 @@ uint8_t uart_rx_byte(unsigned int idx)
}
#endif
void uart_fill_lb(void *data)
enum cb_err fill_lb_serial(struct lb_serial *serial)
{
struct lb_serial serial;
serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial->baseaddr = (uint64_t)UART2_DM_BASE;
serial->baud = get_uart_baudrate();
serial->regwidth = 1;
serial->input_hertz = uart_platform_refclk();
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = (uint64_t)UART2_DM_BASE;
serial.baud = get_uart_baudrate();
serial.regwidth = 1;
serial.input_hertz = uart_platform_refclk();
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
return CB_SUCCESS;
}

16
src/soc/samsung/exynos5250/uart.c
View File

@ -132,15 +132,13 @@ void uart_tx_flush(unsigned int idx)
exynos5_uart_tx_flush(uart);
}
void uart_fill_lb(void *data)
enum cb_err fill_lb_serial(struct lb_serial *serial)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = get_uart_baudrate();
serial.regwidth = 4;
serial.input_hertz = uart_platform_refclk();
lb_add_serial(&serial, data);
serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial->baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial->baud = get_uart_baudrate();
serial->regwidth = 4;
serial->input_hertz = uart_platform_refclk();
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
return CB_SUCCESS;
}

16
src/soc/samsung/exynos5420/uart.c
View File

@ -123,15 +123,13 @@ void uart_tx_flush(unsigned int idx)
/* Exynos5250 implements this too. */
}
void uart_fill_lb(void *data)
enum cb_err fill_lb_serial(struct lb_serial *serial)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = get_uart_baudrate();
serial.regwidth = 4;
serial.input_hertz = uart_platform_refclk();
lb_add_serial(&serial, data);
serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial->baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial->baud = get_uart_baudrate();
serial->regwidth = 4;
serial->input_hertz = uart_platform_refclk();
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
return CB_SUCCESS;
}

16
src/soc/ti/am335x/uart.c
View File

@ -170,15 +170,13 @@ void uart_tx_flush(unsigned int idx)
{
}
void uart_fill_lb(void *data)
enum cb_err fill_lb_serial(struct lb_serial *serial)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = get_uart_baudrate();
serial.regwidth = 2;
serial.input_hertz = uart_platform_refclk();
lb_add_serial(&serial, data);
serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial->baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial->baud = get_uart_baudrate();
serial->regwidth = 2;
serial->input_hertz = uart_platform_refclk();
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
return CB_SUCCESS;
}

36
tests/lib/coreboot_table-test.c
View File

@ -117,25 +117,6 @@ static void test_lb_new_record(void **state)
}
}
static void test_lb_add_serial(void **state)
{
struct lb_header *header = *state;
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = 0xFEDC6000;
serial.baud = 115200;
serial.regwidth = 1;
serial.input_hertz = 115200 * 16;
lb_add_serial(&serial, header);
assert_int_equal(1, header->table_entries);
/* Table bytes and checksum should be zero, because it is updated with size of previous
record or when table is closed. No previous record is present. */
assert_int_equal(0, header->table_bytes);
assert_int_equal(0, header->table_checksum);
}
static void test_lb_add_console(void **state)
{
struct lb_header *header = *state;
@ -235,17 +216,15 @@ void bootmem_write_memory_table(struct lb_memory *mem)
}
}
void uart_fill_lb(void *data)
enum cb_err fill_lb_serial(struct lb_serial *serial)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = 0xFEDC6000;
serial.baud = 115200;
serial.regwidth = 1;
serial.input_hertz = 115200 * 16;
lb_add_serial(&serial, data);
serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial->baseaddr = 0xFEDC6000;
serial->baud = 115200;
serial->regwidth = 1;
serial->input_hertz = 115200 * 16;
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
return CB_SUCCESS;
}
struct cbfs_boot_device cbfs_boot_dev = {
@ -495,7 +474,6 @@ int main(void)
const struct CMUnitTest tests[] = {
cmocka_unit_test(test_lb_add_gpios),
cmocka_unit_test_setup(test_lb_new_record, setup_test_header),
cmocka_unit_test_setup(test_lb_add_serial, setup_test_header),
cmocka_unit_test_setup(test_lb_add_console, setup_test_header),
cmocka_unit_test_setup(test_multiple_entries, setup_test_header),
cmocka_unit_test_setup(test_write_coreboot_forwarding_table, setup_test_header),