soc/intel/xeon_sp; Use soc specific stack-port function
Separate the get_stack_for_port into soc specific functions. This removes a #if in common code. Change-Id: Ib38a7d66947ded9b56193a9163e5128b2523e99c Signed-off-by: Marc Jones <marcjones@sysproconsulting.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46971 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -26,5 +26,6 @@ int get_threads_per_package(void);
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const struct SystemMemoryMapHob *get_system_memory_map(void);
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void set_bios_init_completion(void);
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int soc_get_stack_for_port(int port);
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#endif /* _SOC_UTIL_H_ */
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@ -319,3 +319,25 @@ void set_bios_init_completion(void)
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/* And finally, take care of the SBSP */
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set_bios_init_completion_for_package(sbsp_socket_id);
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}
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/*
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* EX: CPX-SP
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* Ports Stack Stack(HOB) IioConfigIou
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* ==========================================
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* 0 CSTACK stack 0 IOU0
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* 1A..1D PSTACKZ stack 1 IOU1
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* 2A..2D PSTACK1 stack 2 IOU2
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* 3A..3D PSTACK2 stack 4 IOU3
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*/
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int soc_get_stack_for_port(int port)
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{
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if (port == PORT_0)
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return CSTACK;
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else if (port >= PORT_1A && port <= PORT_1D)
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return PSTACK0;
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else if (port >= PORT_2A && port <= PORT_2D)
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return PSTACK1;
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else if (port >= PORT_3A && port <= PORT_3D)
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return PSTACK2;
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else
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return -1;
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}
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@ -142,48 +142,6 @@ static unsigned long acpi_fill_slit(unsigned long current)
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return current;
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}
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/*
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* EX: CPX-SP
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* Ports Stack Stack(HOB) IioConfigIou
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* ==========================================
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* 0 CSTACK stack 0 IOU0
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* 1A..1D PSTACKZ stack 1 IOU1
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* 2A..2D PSTACK1 stack 2 IOU2
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* 3A..3D PSTACK2 stack 4 IOU3
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*/
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static int get_stack_for_port(int port)
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{
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#if (CONFIG(SOC_INTEL_COOPERLAKE_SP))
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if (port == PORT_0)
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return CSTACK;
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else if (port >= PORT_1A && port <= PORT_1D)
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return PSTACK0;
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else if (port >= PORT_2A && port <= PORT_2D)
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return PSTACK1;
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else if (port >= PORT_3A && port <= PORT_3D)
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return PSTACK2;
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else
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return -1;
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#endif /* SOC_INTEL_COOPERLAKE_SP */
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#if (CONFIG(SOC_INTEL_SKYLAKE_SP))
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if (port == PORT_0)
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return CSTACK;
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else if (port >= PORT_1A && port <= PORT_1D)
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return PSTACK0;
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else if (port >= PORT_2A && port <= PORT_2D)
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return PSTACK1;
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else if (port >= PORT_3A && port <= PORT_3D)
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return PSTACK2;
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else if (port >= PORT_4A && port <= PORT_4D)
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return PSTACK3; // MCP0
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else if (port >= PORT_5A && port <= PORT_5D)
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return PSTACK4; // MCP1
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else
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return -1;
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#endif /* SOC_INTEL_SKYLAKE_SP */
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}
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/*
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* This function adds PCIe bridge device entry in DMAR table. If it is called
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* in the context of ATSR subtable, it adds ATSR subtable when it is first called.
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@ -193,7 +151,7 @@ static unsigned long acpi_create_dmar_ds_pci_br_for_port(unsigned long current,
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bool is_atsr, bool *first)
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{
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if (get_stack_for_port(port) != stack)
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if (soc_get_stack_for_port(port) != stack)
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return 0;
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const uint32_t bus = iio_resource.StackRes[stack].BusBase;
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@ -27,5 +27,6 @@ const struct SystemMemoryMapHob *get_system_memory_map(void);
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void set_bios_init_completion(void);
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unsigned int soc_get_num_cpus(void);
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int soc_get_stack_for_port(int port);
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#endif /* _SOC_UTIL_H_ */
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@ -394,4 +394,32 @@ void xeonsp_init_cpu_config(void)
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}
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}
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/*
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* EX: SKX-SP
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* Ports Stack Stack(HOB) IioConfigIou
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* ==========================================
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* 0 CSTACK stack 0 IOU0
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* 1A..1D PSTACKZ stack 1 IOU1
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* 2A..2D PSTACK1 stack 2 IOU2
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* 3A..3D PSTACK2 stack 3 IOU3
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* 5A..4D PSTACK3 stack 4 IOU4
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* 5A..5D PSTACK4 stack 5 IOU5
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*/
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int soc_get_stack_for_port(int port)
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{
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if (port == PORT_0)
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return CSTACK;
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else if (port >= PORT_1A && port <= PORT_1D)
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return PSTACK0;
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else if (port >= PORT_2A && port <= PORT_2D)
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return PSTACK1;
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else if (port >= PORT_3A && port <= PORT_3D)
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return PSTACK2;
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else if (port >= PORT_4A && port <= PORT_4D)
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return PSTACK3; // MCP0
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else if (port >= PORT_5A && port <= PORT_5D)
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return PSTACK4; // MCP1
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else
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return -1;
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}
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#endif
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