GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

src/mainboard/siemens: Use PTN3460 chip driver 

This patch replaces and cleans up the redundant PTN3460 driver files in
/mainboard/siemens directories by using the now available driver in
src/drivers/i2c/ptn3460 and providing mainboard specific functions to
the driver.

TEST=Display is working on Siemens mainboards (e.g. mc_tcu3, mc_apl1, ...).

Change-Id: I976a502e7176a356bab772758250db3cdff529b9
Signed-off-by: Uwe Poeche <uwe.poeche@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36643
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Uwe Poeche 2019-11-05 15:44:42 +01:00 committed by Patrick Georgi
parent 11a34ec4c2
commit 996588521a
29 changed files with 478 additions and 1195 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/siemens/mc_apl1/variants/mc_apl1/Kconfig
View File

@ -8,5 +8,6 @@ config BOARD_SPECIFIC_OPTIONS
select DRIVER_SIEMENS_NC_FPGA
select NC_FPGA_NOTIFY_CB_READY
select APL_SKIP_SET_POWER_LIMITS
select DRIVERS_I2C_PTN3460
endif # BOARD_SIEMENS_MC_APL1

2
src/mainboard/siemens/mc_apl1/variants/mc_apl1/Makefile.inc
View File

@ -1,2 +1,2 @@
ramstage-y += mainboard.c
ramstage-y += ptn3460.c
ramstage-y += lcd_panel.c

4
src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
View File

@ -93,6 +93,10 @@ chip soc/intel/apollolake
register "user_weekday" = "4"
device i2c 0x32 on end # RTC RX6110 SA
end
# Enable external display bridge (eDP to LVDS)
chip drivers/i2c/ptn3460
device i2c 0x20 on end # PTN3460 DP2LVDS Bridge
end
end
device pci 16.1 off end # - I2C 1
device pci 16.2 off end # - I2C 2

91
src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/ptn3460.h
View File

@ -1,91 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014-2017 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef PTN3460_H_
#define PTN3460_H_
#include <stdint.h>
#define PTN_SLAVE_ADR 0x20
#define PTN_I2C_CONTROLLER 0
#define PTN_EDID_OFF 0x00
#define PTN_EDID_LEN 0x80
#define PTN_CONFIG_OFF 0x80
#define PTN_FLASH_CFG_OFF 0xE8
#define PTN_FLASH_CFG_LEN 0x04
#define PTN_MAX_EDID_NUM 6
/* Define some error codes that can be used. */
#define PTN_NO_ERROR 0x00000000
#define PTN_BUS_ERROR 0x10000000
#define PTN_INVALID_EDID 0x20000000
struct ptn_3460_config {
/* DisplayPort interface control. */
uint8_t dp_interface_ctrl;
/* LVDS interface control register 1. */
uint8_t lvds_interface_ctrl1;
/* LVDS interface control register 2. */
uint8_t lvds_interface_ctrl2;
/* LVDS interface control register 3. */
uint8_t lvds_interface_ctrl3;
/* Select which EDID-block is emulated. */
uint8_t edid_rom_emulation;
/* Select which EDID block to map to 0..0x7F. */
uint8_t edid_rom_access_ctrl;
/* Smallest PWM frequency for back light. */
uint8_t pwm_min[3];
/* Biggest PWM frequency for back light. */
uint8_t pwm_max[3];
/* Fast link training control register. */
uint8_t fast_link_ctrl;
/* Pin configuration control register 1. */
uint8_t pin_cfg_ctrl1;
/* Pin configuration control register 2. */
uint8_t pin_cfg_ctrl2;
/* Default PWM bit count in DPCD register. */
uint8_t pwm_default;
/* Current PWM bit count in DPCD register. */
uint16_t pwm_value;
/* Default PWM frequency in DPCD register. */
uint8_t pwm_default_freq;
/* Panel T3 timing value. */
uint8_t t3_timing;
/* Panel T12 timing value. */
uint8_t t12_timing;
/* Back light control register. */
uint8_t backlight_ctrl;
/* Panel T2 delay. */
uint8_t t2_delay;
/* Panel T4 timing value. */
uint8_t t4_timing;
/* Panel T5 delay. */
uint8_t t5_delay;
} __packed;
struct ptn_3460_flash {
/* Flash command (erase or erase and flash). */
uint8_t cmd;
/* Magic number needed by the flash algorithm. */
uint16_t magic;
/* Trigger for starting flash operation. */
uint8_t trigger;
} __packed;
int ptn3460_init(const char *hwi_block);
int ptn3460_write_edid(uint8_t edid_num, const uint8_t data[PTN_EDID_LEN]);
int ptn_select_edid(uint8_t edid_num);
#endif /* PTN3460_H_ */

102
src/mainboard/siemens/mc_apl1/variants/mc_apl1/lcd_panel.c Normal file
View File

@ -0,0 +1,102 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014-2019 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/device.h>
#include <drivers/i2c/ptn3460/ptn3460.h>
#include <hwilib.h>
#include <types.h>
/** \brief This function provides EDID data to the driver for DP2LVDS Bridge (PTN3460)
* @param edid_data pointer to EDID data in driver
*/
enum cb_err mb_get_edid(uint8_t edid_data[0x80])
{
const char *hwi_block = "hwinfo.hex";
if (hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n", hwi_block);
return CB_ERR;
}
/* Get EDID data from hwinfo block */
if (hwilib_get_field(Edid, edid_data, PTN_EDID_LEN) != PTN_EDID_LEN) {
printk(BIOS_ERR, "LCD: No EDID data available in %s\n", hwi_block);
return CB_ERR;
}
return CB_SUCCESS;
}
/** \brief This function provides EDID block [0..6] to the driver for DP2LVDS Bridge (PTN3460)
* which has to be used.
*/
uint8_t mb_select_edid_table(void)
{
return 6; /* With this mainboard we use EDID block 6 for emulation in PTN3460. */
}
/** \brief Function to enable mainboard to adjust the config data of PTN3460.
* @param *cfg_ptr Pointer to the PTN config structure to modify.
* @return -1 on error; PTN_CFG_MODIFIED if data was modified and needs to be updated.
*/
int mb_adjust_cfg(struct ptn_3460_config *cfg)
{
const char *hwi_block = "hwinfo.hex";
uint8_t disp_con = 0, color_depth = 0;
if (hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n", hwi_block);
return -1;
}
if (hwilib_get_field(PF_DisplCon, &disp_con, sizeof(disp_con)) != sizeof(disp_con)) {
printk(BIOS_ERR, "LCD: Missing panel features from %s\n", hwi_block);
return -1;
}
if (hwilib_get_field(PF_Color_Depth, &color_depth,
sizeof(color_depth)) != sizeof(color_depth)) {
printk(BIOS_ERR, "LCD: Missing panel features from %s\n", hwi_block);
return -1;
}
/* Set up configuration data according to the hwinfo block we got. */
cfg->dp_interface_ctrl = 0x00;
cfg->lvds_interface_ctrl1 = 0x00;
if (disp_con == PF_DISPLCON_LVDS_DUAL) {
/* Turn on dual LVDS lane and clock. */
cfg->lvds_interface_ctrl1 |= 0x0b;
}
if (color_depth == PF_COLOR_DEPTH_6BIT) {
/* Use 18 bits per pixel. */
cfg->lvds_interface_ctrl1 |= 0x20;
}
/* 1 % clock spreading, 300 mV LVDS swing. */
cfg->lvds_interface_ctrl2 = 0x13;
/* No LVDS lane swap. */
cfg->lvds_interface_ctrl3 = 0x00;
/* Delay T2 (VDD to LVDS active) by 16 ms. */
cfg->t2_delay = 1;
/* 500 ms from LVDS to backlight active. */
cfg->t3_timing = 10;
/* 1 second re-power delay. */
cfg->t12_timing = 20;
/* 150 ms backlight off to LVDS inactive. */
cfg->t4_timing = 3;
/* Delay T5 (LVDS to VDD inactive) by 16 ms. */
cfg->t5_delay = 1;
/* Enable backlight control. */
cfg->backlight_ctrl = 0;
return PTN_CFG_MODIFIED;
}

12
src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c
View File

@ -26,25 +26,13 @@
#include <timestamp.h>
#include <baseboard/variants.h>
#include <types.h>
#include <variant/ptn3460.h>
#define TX_DWORD3 0xa8c
void variant_mainboard_final(void)
{
int status;
struct device *dev = NULL;
/*
* Set up the DP2LVDS converter.
* ptn3460_init() may only be executed after i2c bus init.
*/
status = ptn3460_init("hwinfo.hex");
if (status)
printk(BIOS_ERR, "LCD: Set up PTN with status 0x%x\n", status);
else
printk(BIOS_INFO, "LCD: Set up PTN was successful.\n");
/*
* PIR6 register mapping for PCIe root ports
* INTA#->PIRQB#, INTB#->PIRQC#, INTC#->PIRQD#, INTD#-> PIRQA#

171
src/mainboard/siemens/mc_apl1/variants/mc_apl1/ptn3460.c
View File

@ -1,171 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014-2017 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <hwilib.h>
#include <device/i2c_simple.h>
#include <types.h>
#include <variant/ptn3460.h>
/**
* This function sets up the DP2LVDS-converter to be used with the appropriate
* lcd panel.
*
* @param *hwi_block Filename in CBFS of the block to use as HW-Info.
* @return 0 on success or HWI-Data/PTN error code.
*/
int ptn3460_init(const char *hwi_block)
{
struct ptn_3460_config cfg;
int status;
uint8_t disp_con = 0, color_depth = 0;
uint8_t edid_data[PTN_EDID_LEN];
int i;
if (!hwi_block || hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n",
hwi_block);
return 1;
}
/* Get all needed information from hwinfo block. */
if (hwilib_get_field(Edid, edid_data, sizeof(edid_data)) !=
sizeof(edid_data)) {
printk(BIOS_ERR, "LCD: No EDID data available in %s\n",
hwi_block);
return 1;
}
if ((hwilib_get_field(PF_DisplCon, &disp_con, sizeof(disp_con)) !=
sizeof(disp_con))) {
printk(BIOS_ERR, "LCD: Missing panel features from %s\n",
hwi_block);
return 1;
}
if (hwilib_get_field(PF_Color_Depth, &color_depth, sizeof(color_depth))
!= sizeof(color_depth)) {
printk(BIOS_ERR, "LCD: Missing panel features from %s\n",
hwi_block);
return 1;
}
/*
* Here, all the desired information for setting up DP2LVDS converter
* is present. Inside the converter, table 6 will be used for the
* timings.
*/
status = ptn3460_write_edid(6, edid_data);
if (status)
return status;
/* Select this table to be emulated. */
ptn_select_edid(6);
/* Read PTN configuration data. */
status = i2c_read_bytes(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
PTN_CONFIG_OFF, (uint8_t *)&cfg,
sizeof(cfg));
if (status)
return (PTN_BUS_ERROR | status);
/* Set up configuration data according to the hwinfo block we get. */
cfg.dp_interface_ctrl = 0;
cfg.lvds_interface_ctrl1 = 0x00;
if (disp_con == PF_DISPLCON_LVDS_DUAL)
/* Turn on dual LVDS lane and clock. */
cfg.lvds_interface_ctrl1 |= 0x0b;
if (color_depth == PF_COLOR_DEPTH_6BIT)
/* Use 18 bits per pixel. */
cfg.lvds_interface_ctrl1 |= 0x20;
/* 1 % clock spreading, 300 mV LVDS swing. */
cfg.lvds_interface_ctrl2 = 0x13;
/* No LVDS signal swap. */
cfg.lvds_interface_ctrl3 = 0x00;
/* Delay T2 (VDD to LVDS active) by 16 ms. */
cfg.t2_delay = 1;
/* 250 ms from LVDS to backlight active. */
cfg.t3_timing = 10;
/* 1 second re-power delay. */
cfg.t12_timing = 20;
/* 150 ms backlight off to LVDS inactive. */
cfg.t4_timing = 3;
/* Delay T5 (LVDS to VDD inactive) by 16 ms. */
cfg.t5_delay = 1;
/* Enable backlight control. */
cfg.backlight_ctrl = 0;
/* Write back configuration data to PTN3460. */
for (i = 0; i < sizeof(struct ptn_3460_config); i++) {
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
PTN_CONFIG_OFF+i,
*(((uint8_t *)&cfg)+i));
if (status)
return (PTN_BUS_ERROR | status);
}
return PTN_NO_ERROR;
}
/**
* This function writes one Extended Display Identification Data (EDID)
* structure to PTN3460.
*
* @param edid_num Number of EDID that must be written (0..6).
* @param *data Pointer to a buffer where data to write is stored in.
* @return 0 on success or error code.
*/
int ptn3460_write_edid(uint8_t edid_num, const uint8_t data[PTN_EDID_LEN])
{
int status;
int i;
if (edid_num > PTN_MAX_EDID_NUM)
return PTN_INVALID_EDID;
/* First enable access to the desired EDID table. */
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
PTN_CONFIG_OFF + 5, edid_num);
if (status)
return (PTN_BUS_ERROR | status);
/* Now we can simply write EDID-data to ptn3460. */
for (i = 0; i < PTN_EDID_LEN; i++) {
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
PTN_EDID_OFF + i, data[i]);
if (status)
return (PTN_BUS_ERROR | status);
}
return PTN_NO_ERROR;
}
/**
* This function selects one of 7 EDID-tables inside PTN3460 which should be
* emulated on DisplayPort and turn emulation ON.
*
* @param edid_num Number of EDID to emulate (0..6).
* @return 0 on success or error code.
*/
int ptn_select_edid(uint8_t edid_num)
{
int status;
uint8_t val;
if (edid_num > PTN_MAX_EDID_NUM)
return PTN_INVALID_EDID;
/* Enable emulation of the desired EDID table. */
val = (edid_num << 1) | 1;
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
PTN_CONFIG_OFF + 4, val);
if (status)
return (PTN_BUS_ERROR | status);
else
return PTN_NO_ERROR;
}

1
src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig
View File

@ -8,6 +8,7 @@ config BOARD_SPECIFIC_OPTIONS
select MAINBOARD_HAS_TPM2
select MAINBOARD_HAS_LPC_TPM
select TPM_ON_FAST_SPI
select DRIVERS_I2C_PTN3460
config UART_FOR_CONSOLE
default 1

3
src/mainboard/siemens/mc_apl1/variants/mc_apl4/Makefile.inc
View File

@ -2,5 +2,4 @@ romstage-y += memory.c
romstage-y += gpio.c
ramstage-y += gpio.c
ramstage-y += mainboard.c
ramstage-y += ptn3460.c
ramstage-y += lcd_panel.c

7
src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
View File

@ -75,7 +75,12 @@ chip soc/intel/apollolake
device pci 17.0 on end # - I2C 4
device pci 17.1 on end # - I2C 5
device pci 17.2 on end # - I2C 6
device pci 17.3 on end # - I2C 7
device pci 17.3 on # - I2C 7
# Enable external display bridge (eDP to LVDS)
chip drivers/i2c/ptn3460
device i2c 0x60 on end # PTN3460 DP2LVDS Bridge
end
end
device pci 18.0 on end # - UART 0
device pci 18.1 on end # - UART 1
device pci 18.2 on end # - UART 2

91
src/mainboard/siemens/mc_apl1/variants/mc_apl4/include/variant/ptn3460.h
View File

@ -1,91 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014-2018 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef PTN3460_H_
#define PTN3460_H_
#include <stdint.h>
#define PTN_SLAVE_ADR 0x60
#define PTN_I2C_CONTROLLER 7
#define PTN_EDID_OFF 0x00
#define PTN_EDID_LEN 0x80
#define PTN_CONFIG_OFF 0x80
#define PTN_FLASH_CFG_OFF 0xE8
#define PTN_FLASH_CFG_LEN 0x04
#define PTN_MAX_EDID_NUM 6
/* Define some error codes that can be used. */
#define PTN_NO_ERROR 0x00000000
#define PTN_BUS_ERROR 0x10000000
#define PTN_INVALID_EDID 0x20000000
struct ptn_3460_config {
/* DisplayPort interface control. */
uint8_t dp_interface_ctrl;
/* LVDS interface control register 1. */
uint8_t lvds_interface_ctrl1;
/* LVDS interface control register 2. */
uint8_t lvds_interface_ctrl2;
/* LVDS interface control register 3. */
uint8_t lvds_interface_ctrl3;
/* Select which EDID-block is emulated. */
uint8_t edid_rom_emulation;
/* Select which EDID block to map to 0..0x7F. */
uint8_t edid_rom_access_ctrl;
/* Smallest PWM frequency for back light. */
uint8_t pwm_min[3];
/* Biggest PWM frequency for back light. */
uint8_t pwm_max[3];
/* Fast link training control register. */
uint8_t fast_link_ctrl;
/* Pin configuration control register 1. */
uint8_t pin_cfg_ctrl1;
/* Pin configuration control register 2. */
uint8_t pin_cfg_ctrl2;
/* Default PWM bit count in DPCD register. */
uint8_t pwm_default;
/* Current PWM bit count in DPCD register. */
uint16_t pwm_value;
/* Default PWM frequency in DPCD register. */
uint8_t pwm_default_freq;
/* Panel T3 timing value. */
uint8_t t3_timing;
/* Panel T12 timing value. */
uint8_t t12_timing;
/* Back light control register. */
uint8_t backlight_ctrl;
/* Panel T2 delay. */
uint8_t t2_delay;
/* Panel T4 timing value. */
uint8_t t4_timing;
/* Panel T5 delay. */
uint8_t t5_delay;
} __packed;
struct ptn_3460_flash {
/* Flash command (erase or erase and flash). */
uint8_t cmd;
/* Magic number needed by the flash algorithm. */
uint16_t magic;
/* Trigger for starting flash operation. */
uint8_t trigger;
} __packed;
int ptn3460_init(const char *hwi_block);
int ptn3460_write_edid(uint8_t edid_num, const uint8_t data[PTN_EDID_LEN]);
int ptn_select_edid(uint8_t edid_num);
#endif /* PTN3460_H_ */

103
src/mainboard/siemens/mc_apl1/variants/mc_apl4/lcd_panel.c Normal file
View File

@ -0,0 +1,103 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014-2019 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/device.h>
#include <drivers/i2c/ptn3460/ptn3460.h>
#include <hwilib.h>
#include <types.h>
/** \brief This function provides EDID data to the driver for DP2LVDS Bridge (PTN3460)
* @param edid_data pointer to EDID data in driver
*/
enum cb_err mb_get_edid(uint8_t edid_data[0x80])
{
const char *hwi_block = "hwinfo.hex";
if (hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n", hwi_block);
return CB_ERR;
}
/* Get EDID data from hwinfo block */
if (hwilib_get_field(Edid, edid_data, PTN_EDID_LEN) != PTN_EDID_LEN) {
printk(BIOS_ERR, "LCD: No EDID data available in %s\n", hwi_block);
return CB_ERR;
}
return CB_SUCCESS;
}
/** \brief This function provides EDID block [0..6] to the driver for DP2LVDS Bridge (PTN3460)
* which has to be used.
*/
uint8_t mb_select_edid_table(void)
{
return 6; /* With this mainboard we use EDID block 6 for emulation in PTN3460. */
}
/** \brief Function to enable mainboard to adjust the config data of PTN3460.
* @param *cfg_ptr Pointer to the PTN config structure to modify.
* @return -1 on error; PTN_CFG_MODIFIED if data was modified and needs to be updated.
*/
int mb_adjust_cfg(struct ptn_3460_config *cfg)
{
const char *hwi_block = "hwinfo.hex";
uint8_t disp_con = 0, color_depth = 0;
if (hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n", hwi_block);
return -1;
}
if (hwilib_get_field(PF_DisplCon, &disp_con, sizeof(disp_con)) != sizeof(disp_con)) {
printk(BIOS_ERR, "LCD: Missing panel features from %s\n", hwi_block);
return -1;
}
if (hwilib_get_field(PF_Color_Depth, &color_depth,
sizeof(color_depth)) != sizeof(color_depth)) {
printk(BIOS_ERR, "LCD: Missing panel features from %s\n", hwi_block);
return -1;
}
/* Set up configuration data according to the hwinfo block we got. */
cfg->dp_interface_ctrl = 0x00;
/* Use odd-bus for clock distribution only. */
cfg->lvds_interface_ctrl1 = 0x01;
if (disp_con == PF_DISPLCON_LVDS_DUAL) {
/* Turn on dual LVDS lane and clock. */
cfg->lvds_interface_ctrl1 |= 0x0b;
}
if (color_depth == PF_COLOR_DEPTH_6BIT) {
/* Use 18 bits per pixel. */
cfg->lvds_interface_ctrl1 |= 0x20;
}
/* No clock spreading, 300 mV LVDS swing. */
cfg->lvds_interface_ctrl2 = 0x03;
/* Swap LVDS lanes (N vs. P). */
cfg->lvds_interface_ctrl3 = 0x04;
/* Delay T2 (VDD to LVDS active) by 16 ms. */
cfg->t2_delay = 1;
/* 500 ms from LVDS to backlight active. */
cfg->t3_timing = 10;
/* 1 second re-power delay. */
cfg->t12_timing = 20;
/* 150 ms backlight off to LVDS inactive. */
cfg->t4_timing = 3;
/* Delay T5 (LVDS to VDD inactive) by 16 ms. */
cfg->t5_delay = 1;
/* Enable backlight control. */
cfg->backlight_ctrl = 0;
return PTN_CFG_MODIFIED;
}

35
src/mainboard/siemens/mc_apl1/variants/mc_apl4/mainboard.c
View File

@ -1,35 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2018 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <bootstate.h>
#include <console/console.h>
#include <hwilib.h>
#include <baseboard/variants.h>
#include <variant/ptn3460.h>
void variant_mainboard_final(void)
{
int status;
/*
* Set up the DP2LVDS converter.
* ptn3460_init() may only be executed after i2c bus init.
*/
status = ptn3460_init("hwinfo.hex");
if (status)
printk(BIOS_ERR, "LCD: Set up PTN with status 0x%x\n", status);
else
printk(BIOS_INFO, "LCD: Set up PTN was successful.\n");
}

172
src/mainboard/siemens/mc_apl1/variants/mc_apl4/ptn3460.c
View File

@ -1,172 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014-2018 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <hwilib.h>
#include <device/i2c_simple.h>
#include <types.h>
#include <variant/ptn3460.h>
/*
* This function sets up the DP2LVDS-converter to be used with the appropriate
* lcd panel.
*
* @param *hwi_block Filename in CBFS of the block to use as HW-Info.
* @return 0 on success or HWI-Data/PTN error code.
*/
int ptn3460_init(const char *hwi_block)
{
struct ptn_3460_config cfg;
int status;
uint8_t disp_con = 0, color_depth = 0;
uint8_t edid_data[PTN_EDID_LEN];
int i;
if (!hwi_block || hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n",
hwi_block);
return 1;
}
/* Get all needed information from hwinfo block. */
if (hwilib_get_field(Edid, edid_data, sizeof(edid_data)) !=
sizeof(edid_data)) {
printk(BIOS_ERR, "LCD: No EDID data available in %s\n",
hwi_block);
return 1;
}
if ((hwilib_get_field(PF_DisplCon, &disp_con, sizeof(disp_con)) !=
sizeof(disp_con))) {
printk(BIOS_ERR, "LCD: Missing panel features from %s\n",
hwi_block);
return 1;
}
if (hwilib_get_field(PF_Color_Depth, &color_depth, sizeof(color_depth))
!= sizeof(color_depth)) {
printk(BIOS_ERR, "LCD: Missing panel features from %s\n",
hwi_block);
return 1;
}
/*
* Here, all the desired information for setting up DP2LVDS converter
* is present. Inside the converter, table 6 will be used for the
* timings.
*/
status = ptn3460_write_edid(6, edid_data);
if (status)
return status;
/* Select this table to be emulated. */
ptn_select_edid(6);
/* Read PTN configuration data. */
status = i2c_read_bytes(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
PTN_CONFIG_OFF, (uint8_t *)&cfg,
sizeof(cfg));
if (status)
return (PTN_BUS_ERROR | status);
/* Set up configuration data according to the hwinfo block we get. */
cfg.dp_interface_ctrl = 0;
/* Use odd-bus for clock distribution only. */
cfg.lvds_interface_ctrl1 = 0x01;
if (disp_con == PF_DISPLCON_LVDS_DUAL)
/* Turn on dual LVDS lane and clock. */
cfg.lvds_interface_ctrl1 |= 0x0b;
if (color_depth == PF_COLOR_DEPTH_6BIT)
/* Use 18 bits per pixel. */
cfg.lvds_interface_ctrl1 |= 0x20;
/* No clock spreading, 300 mV LVDS swing. */
cfg.lvds_interface_ctrl2 = 0x03;
/* Swap LVDS signal (N vs. P). */
cfg.lvds_interface_ctrl3 = 0x04;
/* Delay T2 (VDD to LVDS active) by 16 ms. */
cfg.t2_delay = 1;
/* 250 ms from LVDS to backlight active. */
cfg.t3_timing = 10;
/* 1 second re-power delay. */
cfg.t12_timing = 20;
/* 150 ms backlight off to LVDS inactive. */
cfg.t4_timing = 3;
/* Delay T5 (LVDS to VDD inactive) by 16 ms. */
cfg.t5_delay = 1;
/* Enable backlight control. */
cfg.backlight_ctrl = 0;
/* Write back configuration data to PTN3460. */
for (i = 0; i < sizeof(struct ptn_3460_config); i++) {
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
PTN_CONFIG_OFF+i,
*(((uint8_t *)&cfg)+i));
if (status)
return (PTN_BUS_ERROR | status);
}
return PTN_NO_ERROR;
}
/*
* This function writes one Extended Display Identification Data (EDID)
* structure to PTN3460.
*
* @param edid_num Number of EDID that must be written (0..6).
* @param *data Pointer to a buffer where data to write is stored in.
* @return 0 on success or error code.
*/
int ptn3460_write_edid(uint8_t edid_num, const uint8_t data[PTN_EDID_LEN])
{
int status;
int i;
if (edid_num > PTN_MAX_EDID_NUM)
return PTN_INVALID_EDID;
/* First enable access to the desired EDID table. */
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
PTN_CONFIG_OFF + 5, edid_num);
if (status)
return (PTN_BUS_ERROR | status);
/* Now we can simply write EDID-data to ptn3460. */
for (i = 0; i < PTN_EDID_LEN; i++) {
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
PTN_EDID_OFF + i, data[i]);
if (status)
return (PTN_BUS_ERROR | status);
}
return PTN_NO_ERROR;
}
/*
* This function selects one of 7 EDID-tables inside PTN3460 which should be
* emulated on DisplayPort and turn emulation ON.
*
* @param edid_num Number of EDID to emulate (0..6).
* @return 0 on success or error code.
*/
int ptn_select_edid(uint8_t edid_num)
{
int status;
uint8_t val;
if (edid_num > PTN_MAX_EDID_NUM)
return PTN_INVALID_EDID;
/* Enable emulation of the desired EDID table. */
val = (edid_num << 1) | 1;
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
PTN_CONFIG_OFF + 4, val);
if (status)
return (PTN_BUS_ERROR | status);
else
return PTN_NO_ERROR;
}

1
src/mainboard/siemens/mc_apl1/variants/mc_apl5/Kconfig
View File

@ -11,6 +11,7 @@ config BOARD_SPECIFIC_OPTIONS
select MAINBOARD_HAS_TPM2
select MAINBOARD_HAS_LPC_TPM
select TPM_ON_FAST_SPI
select DRIVERS_I2C_PTN3460
config CBFS_SIZE
default 0xb4e000

2
src/mainboard/siemens/mc_apl1/variants/mc_apl5/Makefile.inc
View File

@ -2,4 +2,4 @@ romstage-y += gpio.c
ramstage-y += gpio.c
ramstage-y += mainboard.c
ramstage-y += ptn3460.c
ramstage-y += lcd_panel.c

4
src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
View File

@ -84,6 +84,10 @@ chip soc/intel/apollolake
register "user_weekday" = "4"
device i2c 0x32 on end # RTC RX6110 SA
end
# Enable external display bridge (eDP to LVDS)
chip drivers/i2c/ptn3460
device i2c 0x20 on end # PTN3460 DP2LVDS Bridge
end
end
device pci 16.1 off end # - I2C 1
device pci 16.2 off end # - I2C 2

91
src/mainboard/siemens/mc_apl1/variants/mc_apl5/include/variant/ptn3460.h
View File

@ -1,91 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014-2017 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef PTN3460_H_
#define PTN3460_H_
#include <stdint.h>
#define PTN_SLAVE_ADR 0x20
#define PTN_I2C_CONTROLLER 0
#define PTN_EDID_OFF 0x00
#define PTN_EDID_LEN 0x80
#define PTN_CONFIG_OFF 0x80
#define PTN_FLASH_CFG_OFF 0xE8
#define PTN_FLASH_CFG_LEN 0x04
#define PTN_MAX_EDID_NUM 6
/* Define some error codes that can be used. */
#define PTN_NO_ERROR 0x00000000
#define PTN_BUS_ERROR 0x10000000
#define PTN_INVALID_EDID 0x20000000
struct ptn_3460_config {
/* DisplayPort interface control. */
uint8_t dp_interface_ctrl;
/* LVDS interface control register 1. */
uint8_t lvds_interface_ctrl1;
/* LVDS interface control register 2. */
uint8_t lvds_interface_ctrl2;
/* LVDS interface control register 3. */
uint8_t lvds_interface_ctrl3;
/* Select which EDID-block is emulated. */
uint8_t edid_rom_emulation;
/* Select which EDID block to map to 0..0x7F. */
uint8_t edid_rom_access_ctrl;
/* Smallest PWM frequency for back light. */
uint8_t pwm_min[3];
/* Biggest PWM frequency for back light. */
uint8_t pwm_max[3];
/* Fast link training control register. */
uint8_t fast_link_ctrl;
/* Pin configuration control register 1. */
uint8_t pin_cfg_ctrl1;
/* Pin configuration control register 2. */
uint8_t pin_cfg_ctrl2;
/* Default PWM bit count in DPCD register. */
uint8_t pwm_default;
/* Current PWM bit count in DPCD register. */
uint16_t pwm_value;
/* Default PWM frequency in DPCD register. */
uint8_t pwm_default_freq;
/* Panel T3 timing value. */
uint8_t t3_timing;
/* Panel T12 timing value. */
uint8_t t12_timing;
/* Back light control register. */
uint8_t backlight_ctrl;
/* Panel T2 delay. */
uint8_t t2_delay;
/* Panel T4 timing value. */
uint8_t t4_timing;
/* Panel T5 delay. */
uint8_t t5_delay;
} __packed;
struct ptn_3460_flash {
/* Flash command (erase or erase and flash). */
uint8_t cmd;
/* Magic number needed by the flash algorithm. */
uint16_t magic;
/* Trigger for starting flash operation. */
uint8_t trigger;
} __packed;
int ptn3460_init(const char *hwi_block);
int ptn3460_write_edid(uint8_t edid_num, const uint8_t data[PTN_EDID_LEN]);
int ptn_select_edid(uint8_t edid_num);
#endif /* PTN3460_H_ */

128
src/mainboard/siemens/mc_apl1/variants/mc_apl5/lcd_panel.c Normal file
View File

@ -0,0 +1,128 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014-2019 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/device.h>
#include <device/pci_ops.h>
#include <drivers/i2c/ptn3460/ptn3460.h>
#include <hwilib.h>
#include <soc/pci_devs.h>
#include <types.h>
static void igd_disable(void)
{
struct device *root_dev = pcidev_path_on_root(SA_DEVFN_ROOT);
uint8_t deven;
uint16_t ggc;
/* GMCH Graphics Control Register */
ggc = pci_read_config16(root_dev, 0x50);
/* Set size of Graphics Translation Table Memory (GGMS) [7:6]
* to 0 and select 0 MB for Graphics Memory (GMS) [15:8]. */
ggc &= ~(0xffc0);
/* Disable IGD VGA (IVD). */
ggc |= 0x2;
pci_write_config16(root_dev, 0x50, ggc);
/* Device Enable Register */
deven = pci_read_config8(root_dev, 0x54);
/* Disable IGD device (D2F0EN). */
deven &= ~(0x10);
pci_write_config8(root_dev, 0x54, deven);
}
/** \brief This function provides EDID data to the driver for DP2LVDS Bridge (PTN3460)
* @param edid_data pointer to EDID data in driver
*/
enum cb_err mb_get_edid(uint8_t edid_data[0x80])
{
const char *hwi_block = "hwinfo.hex";
if (hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n", hwi_block);
return CB_ERR;
}
/* Get EDID data from hwinfo block */
if (hwilib_get_field(Edid, edid_data, PTN_EDID_LEN) != PTN_EDID_LEN) {
/* Disable IGD to avoid panel failures. */
igd_disable();
printk(BIOS_ERR, "LCD: No EDID data available in %s\n", hwi_block);
return CB_ERR;
}
return CB_SUCCESS;
}
/** \brief This function provides EDID block [0..6] to the driver for DP2LVDS Bridge (PTN3460)
* which has to be used.
*/
uint8_t mb_select_edid_table(void)
{
return 6; /* With this mainboard we use EDID block 6 for emulation in PTN3460. */
}
/** \brief Function to enable mainboard to adjust the config data of PTN3460.
* @param *cfg_ptr Pointer to the PTN config structure to modify.
* @return -1 on error; PTN_CFG_MODIFIED if data was modified and needs to be updated.
*/
int mb_adjust_cfg(struct ptn_3460_config *cfg)
{
const char *hwi_block = "hwinfo.hex";
uint8_t disp_con = 0, color_depth = 0;
if (hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n", hwi_block);
return -1;
}
if (hwilib_get_field(PF_DisplCon, &disp_con, sizeof(disp_con)) != sizeof(disp_con)) {
printk(BIOS_ERR, "LCD: Missing panel features from %s\n", hwi_block);
return -1;
}
if (hwilib_get_field(PF_Color_Depth, &color_depth,
sizeof(color_depth)) != sizeof(color_depth)) {
printk(BIOS_ERR, "LCD: Missing panel features from %s\n", hwi_block);
return -1;
}
/* Set up configuration data according to the hwinfo block we got. */
cfg->dp_interface_ctrl = 0x00;
/* Drive LVDS clock for single mode on odd bus per default. */
cfg->lvds_interface_ctrl1 = 0x01;
if (disp_con == PF_DISPLCON_LVDS_DUAL) {
/* Turn on dual LVDS lane and clock. */
cfg->lvds_interface_ctrl1 |= 0x0b;
}
if (color_depth == PF_COLOR_DEPTH_6BIT) {
/* Use 18 bits per pixel. */
cfg->lvds_interface_ctrl1 |= 0x20;
}
/* 1 % clock spreading, 300 mV LVDS swing. */
cfg->lvds_interface_ctrl2 = 0x13;
/* No LVDS lane swap. */
cfg->lvds_interface_ctrl3 = 0x00;
/* Delay T2 (VDD to LVDS active) by 16 ms. */
cfg->t2_delay = 1;
/* 500 ms from LVDS to backlight active. */
cfg->t3_timing = 10;
/* 1 second re-power delay. */
cfg->t12_timing = 20;
/* 150 ms backlight off to LVDS inactive. */
cfg->t4_timing = 3;
/* Delay T5 (LVDS to VDD inactive) by 16 ms. */
cfg->t5_delay = 1;
/* Enable backlight control. */
cfg->backlight_ctrl = 0;
return PTN_CFG_MODIFIED;
}

12
src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c
View File

@ -27,26 +27,14 @@
#include <timestamp.h>
#include <baseboard/variants.h>
#include <types.h>
#include <variant/ptn3460.h>
#define TX_DWORD3 0xa8c
void variant_mainboard_final(void)
{
int status;
struct device *dev = NULL;
uint16_t cmd;
/*
* Set up the DP2LVDS converter.
* ptn3460_init() may only be executed after i2c bus init.
*/
status = ptn3460_init("hwinfo.hex");
if (status)
printk(BIOS_ERR, "LCD: Set up PTN with status 0x%x\n", status);
else
printk(BIOS_INFO, "LCD: Set up PTN was successful.\n");
/*
* PIR6 register mapping for PCIe root ports
* INTA#->PIRQB#, INTB#->PIRQC#, INTC#->PIRQD#, INTD#-> PIRQA#

197
src/mainboard/siemens/mc_apl1/variants/mc_apl5/ptn3460.c
View File

@ -1,197 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014-2017 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <hwilib.h>
#include <device/i2c_simple.h>
#include <device/pci_ops.h>
#include <soc/pci_devs.h>
#include <types.h>
#include <variant/ptn3460.h>
static void igd_disable(void)
{
struct device *root_dev = pcidev_path_on_root(SA_DEVFN_ROOT);
uint8_t deven;
uint16_t ggc;
/* GMCH Graphics Control Register */
ggc = pci_read_config16(root_dev, 0x50);
/* Set size of Graphics Translation Table Memory (GGMS) [7:6]
* to 0 and select 0 MB for Graphics Memory (GMS) [15:8]. */
ggc &= ~(0xffc0);
/* Disable IGD VGA (IVD). */
ggc |= 0x2;
pci_write_config16(root_dev, 0x50, ggc);
/* Device Enable Register */
deven = pci_read_config8(root_dev, 0x54);
/* Disable IGD device (D2F0EN). */
deven &= ~(0x10);
pci_write_config8(root_dev, 0x54, deven);
}
/**
* This function sets up the DP2LVDS-converter to be used with the appropriate
* lcd panel.
*
* @param *hwi_block Filename in CBFS of the block to use as HW-Info.
* @return 0 on success or HWI-Data/PTN error code.
*/
int ptn3460_init(const char *hwi_block)
{
struct ptn_3460_config cfg;
int status;
uint8_t disp_con = 0, color_depth = 0;
uint8_t edid_data[PTN_EDID_LEN];
int i;
if (!hwi_block || hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n",
hwi_block);
return 1;
}
/* Get all needed information from hwinfo block. */
if (hwilib_get_field(Edid, edid_data, sizeof(edid_data)) !=
sizeof(edid_data)) {
/* Disable IGD to avoid panel failures. */
igd_disable();
printk(BIOS_ERR, "LCD: No EDID data available in %s\n",
hwi_block);
return 1;
}
if ((hwilib_get_field(PF_DisplCon, &disp_con, sizeof(disp_con)) !=
sizeof(disp_con))) {
printk(BIOS_ERR, "LCD: Missing panel features from %s\n",
hwi_block);
return 1;
}
if (hwilib_get_field(PF_Color_Depth, &color_depth, sizeof(color_depth))
!= sizeof(color_depth)) {
printk(BIOS_ERR, "LCD: Missing panel features from %s\n",
hwi_block);
return 1;
}
/*
* Here, all the desired information for setting up DP2LVDS converter
* is present. Inside the converter, table 6 will be used for the
* timings.
*/
status = ptn3460_write_edid(6, edid_data);
if (status)
return status;
/* Select this table to be emulated. */
ptn_select_edid(6);
/* Read PTN configuration data. */
status = i2c_read_bytes(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
PTN_CONFIG_OFF, (uint8_t *)&cfg,
sizeof(cfg));
if (status)
return (PTN_BUS_ERROR | status);
/* Set up configuration data according to the hwinfo block we get. */
cfg.dp_interface_ctrl = 0;
/* Drive LVDS clock for single mode on odd bus per default. */
cfg.lvds_interface_ctrl1 = 0x01;
if (disp_con == PF_DISPLCON_LVDS_DUAL)
/* Turn on dual LVDS lane and clock. */
cfg.lvds_interface_ctrl1 |= 0x0b;
if (color_depth == PF_COLOR_DEPTH_6BIT)
/* Use 18 bits per pixel. */
cfg.lvds_interface_ctrl1 |= 0x20;
/* 1 % clock spreading, 300 mV LVDS swing. */
cfg.lvds_interface_ctrl2 = 0x13;
/* No LVDS signal swap. */
cfg.lvds_interface_ctrl3 = 0x00;
/* Delay T2 (VDD to LVDS active) by 16 ms. */
cfg.t2_delay = 1;
/* 250 ms from LVDS to backlight active. */
cfg.t3_timing = 10;
/* 1 second re-power delay. */
cfg.t12_timing = 20;
/* 150 ms backlight off to LVDS inactive. */
cfg.t4_timing = 3;
/* Delay T5 (LVDS to VDD inactive) by 16 ms. */
cfg.t5_delay = 1;
/* Enable backlight control. */
cfg.backlight_ctrl = 0;
/* Write back configuration data to PTN3460. */
for (i = 0; i < sizeof(struct ptn_3460_config); i++) {
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
PTN_CONFIG_OFF+i,
*(((uint8_t *)&cfg)+i));
if (status)
return (PTN_BUS_ERROR | status);
}
return PTN_NO_ERROR;
}
/**
* This function writes one Extended Display Identification Data (EDID)
* structure to PTN3460.
*
* @param edid_num Number of EDID that must be written (0..6).
* @param *data Pointer to a buffer where data to write is stored in.
* @return 0 on success or error code.
*/
int ptn3460_write_edid(uint8_t edid_num, const uint8_t data[PTN_EDID_LEN])
{
int status;
int i;
if (edid_num > PTN_MAX_EDID_NUM)
return PTN_INVALID_EDID;
/* First enable access to the desired EDID table. */
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
PTN_CONFIG_OFF + 5, edid_num);
if (status)
return (PTN_BUS_ERROR | status);
/* Now we can simply write EDID-data to ptn3460. */
for (i = 0; i < PTN_EDID_LEN; i++) {
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
PTN_EDID_OFF + i, data[i]);
if (status)
return (PTN_BUS_ERROR | status);
}
return PTN_NO_ERROR;
}
/**
* This function selects one of 7 EDID-tables inside PTN3460 which should be
* emulated on DisplayPort and turn emulation ON.
*
* @param edid_num Number of EDID to emulate (0..6).
* @return 0 on success or error code.
*/
int ptn_select_edid(uint8_t edid_num)
{
int status;
uint8_t val;
if (edid_num > PTN_MAX_EDID_NUM)
return PTN_INVALID_EDID;
/* Enable emulation of the desired EDID table. */
val = (edid_num << 1) | 1;
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
PTN_CONFIG_OFF + 4, val);
if (status)
return (PTN_BUS_ERROR | status);
else
return PTN_NO_ERROR;
}

1
src/mainboard/siemens/mc_tcu3/Kconfig
View File

@ -29,6 +29,7 @@ config BOARD_SPECIFIC_OPTIONS
select USE_BLOBS
select CBFS_AUTOGEN_ATTRIBUTES
select USE_SIEMENS_HWILIB
select DRIVERS_I2C_PTN3460
config MAINBOARD_DIR
string

1
src/mainboard/siemens/mc_tcu3/Makefile.inc
View File

@ -17,4 +17,3 @@
ramstage-y += gpio.c
ramstage-y += irqroute.c
ramstage-y += lcd_panel.c
ramstage-y += ptn3460.c

7
src/mainboard/siemens/mc_tcu3/devicetree.cb
View File

@ -50,7 +50,12 @@ chip soc/intel/fsp_baytrail
device pci 16.0 off end # 8086 0F37 - OTG controller
device pci 17.0 on end # 8086 0F50 - EMMC 4.5 Port (MMC1 pins) - Only 1 EMMC port at a time
device pci 18.0 on end # 8086 0F40 - SIO - DMA
device pci 18.1 on end # 8086 0F41 - I2C Port 1
device pci 18.1 on # 8086 0F41 - I2C Port 1
# Enable external display bridge (eDP to LVDS)
chip drivers/i2c/ptn3460
device i2c 0x20 on end # PTN3460 DP2LVDS Bridge
end
end
device pci 18.2 on end # 8086 0F42 - I2C Port 2
device pci 18.3 on end # 8086 0F43 - I2C Port 3
device pci 18.4 on end # 8086 0F44 - I2C Port 4

143
src/mainboard/siemens/mc_tcu3/lcd_panel.c
View File

@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Siemens AG
* Copyright (C) 2014-2019 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -14,17 +14,22 @@
*/
#include <console/console.h>
#include <device/device.h>
#include <drivers/i2c/ptn3460/ptn3460.h>
#include <hwilib.h>
#include <string.h>
#include <types.h>
#include "soc/gpio.h"
#include "lcd_panel.h"
#include "ptn3460.h"
# define MAX_HWI_NAME_LENGTH 20
/** \brief Reads GPIOs used for LCD panel encoding and returns the 4 bit value
* @param no parameters
* @return LCD panel type encoded in 4 bits
*/
u8 get_lcd_panel_type(void)
static u8 get_lcd_panel_type(void)
{
u8 lcd_type_gpio;
@ -35,48 +40,134 @@ u8 get_lcd_panel_type(void)
/* There is an inverter in this signals so we need to invert them as well */
return ((~lcd_type_gpio) & 0x0f);
}
/** \brief Set up LCD panel
* @param no parameters
* @return 0 on success otherwise error value
/** \brief This function checks which LCD panel type is used with the mainboard
* and provides the name of the matching EDID data set in CBFS.
* @param Pointer to the filename in CBFS where the EDID data is located
* @return CB_SUCCESS on success otherwise CB_ERR
*/
int setup_lcd_panel(void)
static enum cb_err get_hwi_filename(char *hwi_block)
{
u8 lcd_type;
int status;
char blockname[33];
enum cb_err ret = CB_SUCCESS;
lcd_type = get_lcd_panel_type();
printk(BIOS_INFO, "LCD: Found panel type %d\n", lcd_type);
switch (lcd_type) {
case LCD_PANEL_TYPE_10_INCH:
strcpy(blockname, "hwinfo10.hex");
strcpy(hwi_block, "hwinfo10.hex");
break;
case LCD_PANEL_TYPE_12_INCH:
strcpy(blockname, "hwinfo12.hex");
strcpy(hwi_block, "hwinfo12.hex");
break;
case LCD_PANEL_TYPE_15_INCH:
strcpy(blockname, "hwinfo15.hex");
strcpy(hwi_block, "hwinfo15.hex");
break;
case LCD_PANEL_TYPE_19_INCH:
strcpy(blockname, "hwinfo19.hex");
strcpy(hwi_block, "hwinfo19.hex");
break;
case LCD_PANEL_TYPE_EDID:
strcpy(blockname, "hwinfo.hex");
strcpy(hwi_block, "hwinfo.hex");
break;
default:
printk(BIOS_ERR, "LCD: No supported panel found.\n");
return 1;
ret = CB_ERR;
break;
}
/* Now that we have the panel type, set up the DP2LVDS converter */
status = ptn3460_init(blockname);
if (status)
printk(BIOS_ERR, "LCD: Setup PTN with status 0x%x\n", status);
else
printk(BIOS_INFO, "LCD: Setup PTN with status 0x%x\n", status);
return status;
return ret;
}
/** \brief This function provides EDID data to the driver for DP2LVDS Bridge (PTN3460)
* @param edid_data pointer to EDID data in driver
*/
enum cb_err mb_get_edid(uint8_t edid_data[0x80])
{
char hwi_block[MAX_HWI_NAME_LENGTH];
if (get_hwi_filename(hwi_block) != CB_SUCCESS)
return CB_ERR;
if (hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n", hwi_block);
return CB_ERR;
}
/* Get EDID data from hwinfo block */
if (hwilib_get_field(Edid, edid_data, PTN_EDID_LEN) != PTN_EDID_LEN) {
printk(BIOS_ERR, "LCD: No EDID data available in %s\n", hwi_block);
return CB_ERR;
}
return CB_SUCCESS;
}
/** \brief This function provides EDID block [0..6] to the driver for DP2LVDS Bridge (PTN3460)
* which has to be used.
*/
uint8_t mb_select_edid_table(void)
{
return 6; /* With this mainboard we use EDID block 6 for emulation in PTN3460. */
}
/** \brief Function to enable mainboard to adjust the config data of PTN3460.
* @param *cfg_ptr Pointer to the PTN config structure to modify.
* @return -1 on error; PTN_CFG_MODIFIED if data was modified and needs to be updated.
*/
int mb_adjust_cfg(struct ptn_3460_config *cfg)
{
char hwi_block[MAX_HWI_NAME_LENGTH];
uint8_t disp_con = 0, color_depth = 0;
uint8_t hwid[4], tcu31_hwid[4] = {7, 9, 2, 0};
if (get_hwi_filename(hwi_block) != CB_SUCCESS)
return -1;
if (hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n", hwi_block);
return -1;
}
if (hwilib_get_field(PF_DisplCon, &disp_con, sizeof(disp_con)) != sizeof(disp_con)) {
printk(BIOS_ERR, "LCD: Missing panel features from %s\n", hwi_block);
return -1;
}
if (hwilib_get_field(PF_Color_Depth, &color_depth,
sizeof(color_depth)) != sizeof(color_depth)) {
printk(BIOS_ERR, "LCD: Missing panel features from %s\n", hwi_block);
return -1;
}
/* Set up configuration data according to the hwinfo block we got. */
cfg->dp_interface_ctrl = 0x00;
cfg->lvds_interface_ctrl1 = 0x00;
if (disp_con == PF_DISPLCON_LVDS_DUAL) {
/* Turn on dual LVDS lane and clock. */
cfg->lvds_interface_ctrl1 |= 0x0b;
}
if (color_depth == PF_COLOR_DEPTH_6BIT) {
/* Use 18 bits per pixel. */
cfg->lvds_interface_ctrl1 |= 0x20;
}
/* No clock spreading, 300 mV LVDS swing. */
cfg->lvds_interface_ctrl2 = 0x03;
/* Swap LVDS even and odd lanes for HW-ID 7.9.2.0 only. */
if (hwilib_get_field(HWID, hwid, sizeof(hwid)) == sizeof(hwid) &&
!(memcmp(hwid, tcu31_hwid, sizeof(hwid)))) {
/* Swap LVDS even and odd lane. */
cfg->lvds_interface_ctrl3 = 0x01;
} else {
/* no LVDS lane swap */
cfg->lvds_interface_ctrl3 = 0x00;
}
/* Delay T2 (VDD to LVDS active) by 16 ms. */
cfg->t2_delay = 1;
/* 500 ms from LVDS to backlight active. */
cfg->t3_timing = 10;
/* 1 second re-power delay. */
cfg->t12_timing = 20;
/* 150 ms backlight off to LVDS inactive. */
cfg->t4_timing = 3;
/* Delay T5 (LVDS to VDD inactive) by 16 ms. */
cfg->t5_delay = 1;
/* Enable backlight control. */
cfg->backlight_ctrl = 0;
return PTN_CFG_MODIFIED;
}

6
src/mainboard/siemens/mc_tcu3/lcd_panel.h
View File

@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Siemens AG
* Copyright (C) 2014-2019 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -28,8 +28,4 @@
#define LCD_PANEL_TYPE_19_INCH 1
#define LCD_PANEL_TYPE_EDID 15
u8 get_lcd_panel_type(void);
int setup_lcd_panel(void);
#endif /* _LCD_PANEL_H_ */

4
src/mainboard/siemens/mc_tcu3/mainboard.c
View File

@ -23,8 +23,6 @@
#endif
#include <hwilib.h>
#include <i210.h>
#include "lcd_panel.h"
/** \brief This function will search for a MAC address which can be assigned
* to a MACPHY.
@ -69,12 +67,10 @@ enum cb_err mainboard_get_mac_address(struct device *dev, uint8_t mac[6])
*/
static void mainboard_enable(struct device *dev)
{
}
static void mainboard_final(void *chip_info)
{
setup_lcd_panel();
}
struct chip_operations mainboard_ops = {

209
src/mainboard/siemens/mc_tcu3/ptn3460.c
View File

@ -1,209 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014-2019 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <hwilib.h>
#include <string.h>
#include <delay.h>
#include <types.h>
#include <device/i2c_simple.h>
#include "soc/i2c.h"
#include "ptn3460.h"
/** \brief This functions sets up the DP2LVDS-converter to be used with the
* appropriate lcd panel
* @param *hwi_block Filename in CBFS of the block to use as HW-Info
* @return 0 on success or error code
*/
int ptn3460_init(char *hwi_block)
{
struct ptn_3460_config cfg;
int status;
uint8_t disp_con = 0, color_depth = 0;
uint8_t edid_data[0x80];
uint8_t hwid[4], tcu31_hwid[4] = {7, 9, 2, 0};
uint8_t i;
if (!hwi_block || hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n",
hwi_block);
return 1;
}
/* Get all needed information from hwinfo block */
if (hwilib_get_field(Edid, edid_data, 0x80) != sizeof(edid_data)) {
printk(BIOS_ERR, "LCD: No EDID data available in %s\n",
hwi_block);
return 1;
}
if ((hwilib_get_field(PF_DisplCon, &disp_con, 1) != 1)) {
printk(BIOS_ERR, "LCD: Missing panel features from %s\n",
hwi_block);
return 1;
}
if (hwilib_get_field(PF_Color_Depth, &color_depth, 1) != 1) {
printk(BIOS_ERR, "LCD: Missing panel features from %s\n",
hwi_block);
return 1;
}
/* Here, all the desired information for setting up DP2LVDS converter*/
/* are present. Inside the converter, table 6 will be used for */
/* the timings. */
if ((status = ptn3460_write_edid(6, edid_data)) != 0)
return status;
/* Select this table to be emulated */
ptn_select_edid(6);
/* Read PTN configuration data */
status = i2c_read_bytes(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR, PTN_CONFIG_OFF, (u8 *) &cfg,
sizeof(struct ptn_3460_config));
if (status)
return (PTN_BUS_ERROR | status);
/* Set up configuration data according to the hwinfo blocks we get */
cfg.dp_interface_ctrl = 0;
cfg.lvds_interface_ctrl1 = 0x00;
if (disp_con == PF_DISPLCON_LVDS_DUAL)
cfg.lvds_interface_ctrl1 |= 0x0b; /* Turn on dual LVDS lane and clock */
if (color_depth == PF_COLOR_DEPTH_6BIT)
cfg.lvds_interface_ctrl1 |= 0x20; /* Use 18 bits per pixel */
cfg.lvds_interface_ctrl2 = 0x03; /* no clock spreading, 300 mV LVDS swing */
/* Swap LVDS even and odd lanes for HW-ID 7.9.2.0 only. */
if (hwilib_get_field(HWID, hwid, sizeof(hwid)) == sizeof(hwid) &&
!(memcmp(hwid, tcu31_hwid, sizeof(hwid)))) {
cfg.lvds_interface_ctrl3 = 0x01; /* swap LVDS even and odd */
} else
cfg.lvds_interface_ctrl3 = 0x00; /* no LVDS signal swap */
cfg.t2_delay = 1; /* Delay T2 (VDD to LVDS active) by 16 ms */
cfg.t3_timing = 10; /* 500 ms from LVDS to backlight active */
cfg.t12_timing = 20; /* 1 second re-power delay */
cfg.t4_timing = 3; /* 150 ms backlight off to LVDS inactive */
cfg.t5_delay = 1; /* Delay T5 (LVDS to VDD inactive) by 16 ms */
cfg.backlight_ctrl = 0; /* Enable backlight control */
/* Write back configuration data to PTN3460 */
for (i = 0; i < sizeof(struct ptn_3460_config); i++) {
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR, PTN_CONFIG_OFF + i,
*(((uint8_t *) &cfg) + i));
if (status)
return (PTN_BUS_ERROR | status);
}
return PTN_NO_ERROR;
}
/** \brief This functions reads one desired EDID data structure from PTN3460
* @param edid_num Number of EDID that must be read (0..6)
* @param *data Pointer to a buffer where to store read data
* @return 0 on success or error code
*/
int ptn3460_read_edid(u8 edid_num, u8 *data)
{
int status;
if (edid_num > PTN_MAX_EDID_NUM)
return PTN_INVALID_EDID;
/* First enable access to the desired EDID table */
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR, PTN_CONFIG_OFF + 5, edid_num);
if (status)
return (PTN_BUS_ERROR | status);
/* Now we can simply read back EDID-data */
status = i2c_read_bytes(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR, PTN_EDID_OFF, data,
PTN_EDID_LEN);
if (status)
return (PTN_BUS_ERROR | status);
else
return PTN_NO_ERROR;
}
/** \brief This functions writes one EDID data structure to PTN3460
* @param edid_num Number of EDID that must be written (0..6)
* @param *data Pointer to a buffer where data to write is stored in
* @return 0 on success or error code
*/
int ptn3460_write_edid(u8 edid_num, u8 *data)
{
int status;
int i;
if (edid_num > PTN_MAX_EDID_NUM)
return PTN_INVALID_EDID;
/* First enable access to the desired EDID table */
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR, PTN_CONFIG_OFF + 5, edid_num);
if (status)
return (PTN_BUS_ERROR | status);
/* Now we can simply write EDID-data to ptn3460 */
for (i = 0; i < PTN_EDID_LEN; i++) {
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR, PTN_EDID_OFF + i,
data[i]);
if (status)
return (PTN_BUS_ERROR | status);
}
return PTN_NO_ERROR;
}
/** \brief This functions selects one of 7 EDID-tables inside PTN3460
* which should be emulated on display port and turn emulation ON
* @param edid_num Number of EDID to emulate (0..6)
* @return 0 on success or error code
*/
int ptn_select_edid (u8 edid_num)
{
int status;
u8 val;
if (edid_num > PTN_MAX_EDID_NUM)
return PTN_INVALID_EDID;
/* Enable emulation of the desired EDID table */
val = (edid_num << 1) | 1;
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR, PTN_CONFIG_OFF + 4, val);
if (status)
return (PTN_BUS_ERROR | status);
else
return PTN_NO_ERROR;
}
/** \brief This functions performs a flash operation which will write
* current configuration table (all the EDID-tables and the
* configuration space with a total amount of 1 KByte)
* to the internal flash of PTN3460
* @param none
* @return 0 on success or error code
*/
int ptn3460_flash_config(void)
{
int status, i;
struct ptn_3460_flash flash;
flash.cmd = 0x01; /* perform erase and flash cycle */
flash.magic = 0x7845; /* Magic number to protect flash operation */
flash.trigger = 0x56; /* This value starts flash operation */
for (i = 0; i < sizeof(struct ptn_3460_flash); i++) {
status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR, PTN_FLASH_CFG_OFF+i,
*(((uint8_t *) &flash) + i));
if (status)
return (PTN_BUS_ERROR | status);
}
if (status) {
return (PTN_BUS_ERROR | status);
} else {
/* To ensure the flash operation is finished, we have to wait 300 ms */
mdelay(300);
return PTN_NO_ERROR;
}
}

72
src/mainboard/siemens/mc_tcu3/ptn3460.h
View File

@ -1,72 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef PTN3460_H_
#define PTN3460_H_
#include "lcd_panel.h"
#define PTN_SLAVE_ADR 0x20
#define PTN_I2C_CONTROLLER 0
#define PTN_EDID_OFF 0x00
#define PTN_EDID_LEN 0x80
#define PTN_CONFIG_OFF 0x80
#define PTN_CONFIG_LEN 0x19
#define PTN_FLASH_CFG_OFF 0xE8
#define PTN_FLASH_CFG_LEN 0x04
#define PTN_MAX_EDID_NUM 6
/* Define some error codes that can be used */
#define PTN_NO_ERROR 0x00000000
#define PTN_BUS_ERROR 0x10000000
#define PTN_INVALID_EDID 0x20000000
struct ptn_3460_config{
u8 dp_interface_ctrl; /* DisplayPort interface control */
u8 lvds_interface_ctrl1; /* LVDS interface control register 1 */
u8 lvds_interface_ctrl2; /* LVDS interface control register 2 */
u8 lvds_interface_ctrl3; /* LVDS interface control register 3 */
u8 edid_rom_emulation; /* select which EDID-block is emulated */
u8 edid_rom_access_ctrl; /* select which EDID block to map to 0..0x7F */
u8 pwm_min[3]; /* smallest PWM frequency for back light */
u8 pwm_max[3]; /* biggest PWM frequency for back light */
u8 fast_link_ctrl; /* Fast link training control register */
u8 pin_cfg_ctrl1; /* Pin configuration control register 1 */
u8 pin_cfg_ctrl2; /* Pin configuration control register 2 */
u8 pwm_default; /* Default PWM bit count in DPCD register */
u16 pwm_value; /* Current PWM bit count in DPCD register */
u8 pwm_default_freq; /* Default PWM frequency in DPCD register */
u8 t3_timing; /* Panel T3 timing value */
u8 t12_timing; /* Panel T12 timing value */
u8 backlight_ctrl; /* Back light control register */
u8 t2_delay; /* Panel T2 delay */
u8 t4_timing; /* Panel T4 timing value */
u8 t5_delay; /* Panel T5 delay */
} __packed;
struct ptn_3460_flash{
u8 cmd; /* Flash command (erase or erase and flash) */
u16 magic; /* Magic number needed by the flash algorithm */
u8 trigger; /* Trigger for starting flash operation */
} __packed;
int ptn3460_init(char *hwi_block);
int ptn3460_read_edid(u8 edid_num, u8 *data);
int ptn3460_write_edid(u8 edid_num, u8 *data);
int ptn_select_edid(u8 edid_num);
int ptn3460_flash_config(void);
#endif /* PTN3460_H_ */