Fix IRQ9 and allow ACPI without an MP table for Tyan s289x.
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4787 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -42,6 +42,20 @@ unsigned long acpi_fill_madt(unsigned long current)
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apic_addr = pci_read_config32(dev, PCI_BASE_ADDRESS_1) & ~0xf;
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 4,
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apic_addr, 0);
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/* Initialize interrupt mapping if mptable.c didn't. */
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#if (!CONFIG_GENERATE_MP_TABLE)
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{
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u32 dword;
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dword = 0x0120d218;
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pci_write_config32(dev, 0x7c, dword);
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dword = 0x12008a00;
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pci_write_config32(dev, 0x80, dword);
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dword = 0x0000007d;
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pci_write_config32(dev, 0x84, dword);
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}
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#endif
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}
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/* Write AMD 8131 two IOAPICs. */
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@ -59,9 +73,9 @@ unsigned long acpi_fill_madt(unsigned long current)
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apic_addr, 0x1C);
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}
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/* IRQ9 ACPI active low. */
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/* IRQ9 */
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);
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current, 0, 9, 9, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_LOW);
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/* 0: mean bus 0--->ISA */
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/* 0: PIC 0 */
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@ -42,6 +42,20 @@ unsigned long acpi_fill_madt(unsigned long current)
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apic_addr = pci_read_config32(dev, PCI_BASE_ADDRESS_1) & ~0xf;
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 4,
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apic_addr, 0);
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/* Initialize interrupt mapping if mptable.c didn't. */
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#if (!CONFIG_GENERATE_MP_TABLE)
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{
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u32 dword;
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dword = 0x0120d218;
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pci_write_config32(dev, 0x7c, dword);
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dword = 0x12008a00;
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pci_write_config32(dev, 0x80, dword);
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dword = 0x0000007d;
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pci_write_config32(dev, 0x84, dword);
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}
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#endif
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}
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/* Write AMD 8131 two IOAPICs. */
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@ -59,9 +73,9 @@ unsigned long acpi_fill_madt(unsigned long current)
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apic_addr, 0x1C);
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}
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/* IRQ9 ACPI active low. */
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/* IRQ9 */
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);
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current, 0, 9, 9, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_LOW);
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/* 0: mean bus 0--->ISA */
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/* 0: PIC 0 */
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@ -42,6 +42,20 @@ unsigned long acpi_fill_madt(unsigned long current)
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apic_addr = pci_read_config32(dev, PCI_BASE_ADDRESS_1) & ~0xf;
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 4,
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apic_addr, 0);
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/* Initialize interrupt mapping if mptable.c didn't. */
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#if (!CONFIG_GENERATE_MP_TABLE)
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{
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u32 dword;
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dword = 0x0120d218;
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pci_write_config32(dev, 0x7c, dword);
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dword = 0x12008a00;
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pci_write_config32(dev, 0x80, dword);
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dword = 0x00080d7d;
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pci_write_config32(dev, 0x84, dword);
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}
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#endif
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}
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/* Write AMD 8131 two IOAPICs. */
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@ -65,11 +79,25 @@ unsigned long acpi_fill_madt(unsigned long current)
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apic_addr = pci_read_config32(dev, PCI_BASE_ADDRESS_1) & ~0xf;
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 7,
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apic_addr, 0x20);
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/* Initialize interrupt mapping if mptable.c didn't. */
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#if (!CONFIG_GENERATE_MP_TABLE)
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{
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u32 dword;
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dword = 0x0000d218; // Why does the factory BIOS have 0?
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pci_write_config32(dev, 0x7c, dword);
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dword = 0x00000000;
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pci_write_config32(dev, 0x80, dword);
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dword = 0x00000d00; // Same here.
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pci_write_config32(dev, 0x84, dword);
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}
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#endif
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}
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/* IRQ9 ACPI active low. */
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/* IRQ9 */
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);
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current, 0, 9, 9, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_LOW);
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/* IRQ0 -> APIC IRQ2. */
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/* Doesn't work on this board. */
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