fix a stupid cut and paste error.
This is pretty trivial, as it was correct in the original non-CAR code. Suddently, CAR works nicely. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2572 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -64,24 +64,26 @@ static void soft_reset(void)
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pci_write_config8(PCI_DEV(0, 0x04, 0), 0x47, 1);
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}
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/*
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* GPIO28 of 8111 will control H0_MEMRESET_L
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* GPIO29 of 8111 will control H1_MEMRESET_L
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*/
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static void memreset_setup(void)
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{
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if (is_cpu_pre_c0()) {
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outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 16); //REVC_MEMRST_EN=0
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}
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else {
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outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 16); //REVC_MEMRST_EN=1
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}
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outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 17);
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/* Ensure the CPU has controll of the memory lines */
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outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0),
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SMBUS_IO_BASE + 0xc0 + 29);
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}
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static void memreset(int controllers, const struct mem_controller *ctrl)
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{
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if (is_cpu_pre_c0()) {
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udelay(800);
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outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 17); //REVB_MEMRST_L=1
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udelay(90);
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}
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if (is_cpu_pre_c0()) {
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udelay(800);
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/* Set memreset_high */
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outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0),
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SMBUS_IO_BASE + 0xc0 + 28);
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udelay(90);
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}
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}
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static inline void activate_spd_rom(const struct mem_controller *ctrl)
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