added config and other test files.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Ronald G. Minnich
parent
667393676b
commit
99acb49cf7
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@ -0,0 +1,4 @@
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default ARCH=i386
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dir lib
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dir boot
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dir smp
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@ -0,0 +1,13 @@
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#object i386_subr.o
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#object params.o
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#object hardwaremain.o
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#object vgabios.o CONFIG_VGABIOS
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#object idt.o CONFIG_REALMODE_IDT
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#object pci-irq.c CONFIG_PCIBIOS_IRQ
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#option CONFIG_LOGICAL_CPUS=1
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#option CONFIG_PCIBIOS_IRQ=0
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object c_start.S
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object cpu.c
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object pci_ops.c
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@ -9,6 +9,9 @@ jmp console0
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#define LINUXBIOS_EXTRA_VERSION
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#endif
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#ifndef ASM_CONSOLE_LOGLEVEL
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#define ASM_CONSOLE_LOGLEVEL 5
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#endif
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console_test:
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.ascii "\r\n\r\nLinuxBIOS-"
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.ascii STR(LINUXBIOS_VERSION)
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@ -0,0 +1,9 @@
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if HAVE_MP_TABLE
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object mpspec.o
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end
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#object ioapic.o CONFIG_IOAPIC
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if CONFIG_SMP
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object start_stop.o
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# object secondary.S
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end
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@ -0,0 +1,2 @@
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object elfboot.o
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object hardwaremain.o
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@ -0,0 +1,105 @@
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## This is Architecture independant part of the makefile
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option LINUXBIOS_VERSION="1.1.0"
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option CC="$(CROSS_COMPILE)gcc"
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option HOSTCC="$(CROSS_COMPILE)gcc"
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option OBJCOPY="objcopy"
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makedefine CPP:= $(CC) -no-gcc -x assembler-with-cpp -DASSEMBLY -E
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makedefine LIBGCC_FILE_NAME := $(shell $(CC) -print-libgcc-file-name)
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makedefine GCC_INC_DIR := $(shell $(CC) -print-search-dirs | sed -ne "s/install: \(.*\)/\1include/gp")
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makedefine CPPFLAGS := -I$(TOP)/src/include -I$(TOP)/src/arch/$(ARCH)/include -I$(GCC_INC_DIR) $(CPUFLAGS)
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makedefine ROMCCPPFLAGS := -D__ROMCC__=0 -D__ROMCC_MINOR__=23
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makedefine CFLAGS := $(CPU_OPT) $(CPPFLAGS) -Os -nostdinc -nostdlib -fno-builtin -Wall
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makedefine HOSTCFLAGS:= -Os -Wall
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option LINUXBIOS_BUILD = "$(shell date) "
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option LINUXBIOS_COMPILE_TIME = "$(shell date +%T)"
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option LINUXBIOS_COMPILE_BY = "$(shell whoami)"
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option LINUXBIOS_COMPILE_HOST = "$(shell hostname)"
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option LINUXBIOS_COMPILE_DOMAIN = "$(shell dnsdomainname)"
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option LINUXBIOS_COMPILER = "$(shell $(CC) $(CFLAGS) -v 2>&1 | tail -n 1)"
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option LINUXBIOS_LINKER = "$(shell $(CC) -Wl,-v 2>&1 | grep version | tail -n 1)"
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option LINUXBIOS_ASSEMBLER = "$(shell touch dummy.s ; $(CC) -c -Wa,-v dummy.s 2>&1; rm -f dummy.s dummy.o )"
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makerule ldscript.ld dep "ldoptions $(LDSUBSCRIPTS-1)" act " echo \"INCLUDE ldoptions\" > $@ ; for file in $(LDSUBSCRIPTS-1) ; do echo \"INCLUDE $$file\" >> $@ ; done"
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makerule cpuflags dep "Makefile.settings" act " perl -e 'print \"CPUFLAGS :=\n\"; foreach $$var (split(\" \", $$ENV{VARIABLES})) { if (exists($$ENV{$$var})) { print \"CPUFLAGS += -D$$var\" . (length($$ENV{$$var})?\"=\x27$$ENV{$$var}\x27\":\"\") .\"\n\"} else { print \"CPUFLAGS += -U$$var\n\"} }' > $@"
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makerule ldoptions dep "Makefile.settings" act " perl -e 'foreach $$var (split(\" \", $$ENV{VARIABLES})) { if ($$ENV{$$var} =~ m/^(0x[0-9a-fA-F]+|0[0-7]+|[0-9]+)$$/) { print \"$$var = $$ENV{$$var};\n\"; }}' > $@"
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makerule linuxbios.strip dep "linuxbios" act " $(OBJCOPY) -O binary linuxbios linuxbios.strip"
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makerule linuxbios_c.o dep "$(DRIVERS-1) linuxbios.a $(LIBGCC_FILE_NAME)" act " $(CC) -nostdlib -r -o $@ c_start.o $(DRIVERS-1) linuxbios.a $(LIBGCC_FILE_NAME)"
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makerule linuxbios_c dep "linuxbios_c.o $(TOP)/src/config/linuxbios_c.ld ldoptions" act " $(CC) -nostdlib -nostartfiles -static -o $@ -T $(TOP)/src/config/linuxbios_c.ld linuxbios_c.o"
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##
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## By default compress the C part of linuxbios
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##
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option CONFIG_COMPRESS=1
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option CONFIG_UNCOMPRESSED=!CONFIG_COMPRESS
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makedefine LINUXBIOS_PAYLOAD-$(CONFIG_COMPRESS):=linuxbios_payload.nrv2b
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makedefine LINUXBIOS_PAYLOAD-$(CONFIG_UNCOMPRESSED):=linuxbios_payload.bin
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addaction linuxbios_c "$(CROSS_COMPILE)nm -n linuxbios_c | sort > linuxbios_c.map"
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makerule linuxbios_payload.bin dep "linuxbios_c" act " $(OBJCOPY) -O binary $< $@"
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makerule linuxbios_payload.nrv2b dep " linuxbios_payload.bin nrv2b" act " ./nrv2b e $< $@"
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makerule linuxbios_payload dep "$(LINUXBIOS_PAYLOAD-1) " act "cp $(LINUXBIOS_PAYLOAD-1) linuxbios_payload"
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makerule linuxbios dep "crt0.o linuxbios_payload ldscript.ld " act "$(CC) -nostdlib -nostartfiles -static -o $@ -T ldscript.ld crt0.o"
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addaction linuxbios "$(CROSS_COMPILE)nm -n linuxbios | sort > linuxbios.map"
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makerule linuxbios.a dep "$(OBJECTS-1) " act "rm -f linuxbios.a"
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addaction linuxbios.a "ar cr linuxbios.a $(OBJECTS-1)"
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option CRT0="$(TOP)/src/arch/$(ARCH)/config/crt0.base"
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makerule crt0.S dep "$(CRT0) " act "cp $< $@"
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# the buildrom tool
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makerule buildrom dep "$(TOP)/util/buildrom/buildrom.c" act "$(CC) -o $@ $<"
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# Force crt0.s (which has build time version code in it to rebuild every time)
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makedefine .PHONY : crt0.s
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makerule crt0.s dep "crt0.S crt0_includes.h $(CRT0_INCLUDES) " act "@echo \"$(CPP) ... $< > $@ \""
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addaction crt0.s "$(CPP) $(CPPFLAGS) -I. -I$(TOP)/src $< > $@.new && mv $@.new $@ "
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makerule crt0.o dep "crt0.s " act "@echo $(CC) ... -o $@ $<"
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addaction crt0.o "@$(CC) -c $(CPU_OPT) -o $@ $<"
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makerule etags dep "$(SOURCES) " act "etags $(SOURCES)"
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makerule tags dep "$(SOURCES) " act "ctags $(SOURCES)"
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makerule documentation dep "$(SOURCES) " act "doxygen LinuxBIOSDoc.config "
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makerule ./romcc dep "$(TOP)/util/romcc/romcc.c " act "$(HOSTCC) -g $(HOSTCFLAGS) -DVERSION='\"0.21\"' -DRELEASE_DATE='\"7 april 2003\"' $< -o $@"
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makerule build_opt_tbl dep "$(TOP)/util/options/build_opt_tbl.c $(TOP)/src/include/pc80/mc146818rtc.h $(TOP)/src/include/boot/linuxbios_tables.h " act "$(HOSTCC) $(HOSTCFLAGS) $< -o $@"
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#makerule /$(TARGET_DIR)/option_table.c dep "build_opt_tbl $(MAINBOARD)/cmos.layout " act "./build_opt_tbl -b --config $(MAINBOARD)/cmos.layout "
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makerule option_table.c dep "build_opt_tbl $(MAINBOARD)/cmos.layout " act "./build_opt_tbl -b --config $(MAINBOARD)/cmos.layout "
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if HAVE_OPTION_TABLE
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object ./option_table.o
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#special rule
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#makerule option_table.o dep "option_table.c" act "$(CC) -c $(CFLAGS) -o $@ $<"
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# object option_table.o
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end
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makerule clean act "rm -f linuxbios.* *~"
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addaction clean "rm -f linuxbios "
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addaction clean "rm -f ldoptions cpuflags ldscript.ld"
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addaction clean "rm -f a.out *.s *.l *.o"
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addaction clean "rm -f TAGS tags"
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addaction clean "rm -f docipl"
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addaction clean "rm -f build_opt_tbl option_table.c crt0.S"
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# do standard config files that the user need not specify
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# for now, this is just 'lib', but it may be more later.
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dir /lib
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dir /console
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dir /stream
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dir /devices
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dir /pc80
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dir /boot
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@ -0,0 +1,15 @@
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object printk.o
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if CONFIG_CONSOLE_SERIAL8250
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driver uart8250_console.o
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end
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if CONFIG_CONSOLE_VGA
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driver vga_console.o
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end
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if CONFIG_CONSOLE_LOGBUF
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driver logbuf_console.o
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end
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if CONFIG_CONSOLE_SROM
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driver srom_console.o
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end
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object console.o
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object vsprintf.o
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@ -0,0 +1,3 @@
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option k7=1
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default CPU_FIXUP=1
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#object cpufixup.o
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@ -0,0 +1,3 @@
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default k8=1
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default CPU_FIXUP=1
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object cpufixup.o
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@ -0,0 +1,5 @@
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default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=0
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option i586=1
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object cpuid.o
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if CONFIG_UDELAY_TSC object delay_tsc.o end
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#object tsc.o
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@ -0,0 +1,5 @@
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option i686=1
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option INTEL_PPRO_MTRR=1
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#object microcode.o
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object mtrr.o
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#object l2_cache.o
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@ -0,0 +1,3 @@
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object device.o
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object device_util.o
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object pci_device.o
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@ -0,0 +1,14 @@
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object clog2.o
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object uart8250.o
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object memset.o
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object memcpy.o
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object memcmp.o
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object malloc.o
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object delay.o
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if HAVE_FALLBACK_BOOT
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object fallback_boot.o
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end
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object compute_ip_checksum.o
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object version.o
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# Force version.o to recompile every time
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makedefine .PHONY : version.o
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@ -0,0 +1,316 @@
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#
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###
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### Build code to export a CMOS option table
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###
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default HAVE_OPTION_TABLE=1
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option HAVE_MP_TABLE=0
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####
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#### Build options
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####
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#
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###
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### Location of the DIMM EEPROMS on the SMBUS
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### This is fixed into a narrow range by the DIMM package standard.
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###
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option SMBUS_MEM_DEVICE_START=(0xa << 3)
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option SMBUS_MEM_DEVICE_END=(SMBUS_MEM_DEVICE_START +1)
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option SMBUS_MEM_DEVICE_INC=1
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default CONFIG_CONSOLE_VGA=0
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default CONFIG_CONSOLE_LOGBUF=0
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default CONFIG_CONSOLE_SROM=0
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default CONFIG_SMP=0
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default CONFIG_UDELAY_TSC=0
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#
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###
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### Customize our winbond superio chip for this motherboard
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###
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option SIO_BASE=0x2e
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option SIO_SYSTEM_CLK_INPUT=0
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option CONFIG_CONSOLE_SERIAL8250=0
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#
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###
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### Build code for the fallback boot
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###
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option HAVE_FALLBACK_BOOT=1
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#
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###
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### Build code to reset the motherboard from linuxBIOS
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###
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## option HAVE_HARD_RESET=1
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#
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###
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### Build code to export a programmable irq routing table
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###
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option HAVE_PIRQ_TABLE=1
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option IRQ_SLOT_COUNT=7
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#
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###
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### Build code to export an x86 MP table
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### Useful for specifying IRQ routing values
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###
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##option HAVE_MP_TABLE=1
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#
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###
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### Do not build special code for the keyboard
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###
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default NO_KEYBOARD=1
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#
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###
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### Build code for SMP support
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### Only worry about 2 micro processors
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###
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##option CONFIG_SMP=1
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option MAX_CPUS=1
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#
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###
|
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### Build code to setup a generic IOAPIC
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###
|
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option CONFIG_IOAPIC=1
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#
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###
|
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### MEMORY_HOLE instructs earlymtrr.inc to
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### enable caching from 0-640KB and to disable
|
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### caching from 640KB-1MB using fixed MTRRs
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###
|
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### Enabling this option breaks SMP because secondary
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### CPU identification depends on only variable MTRRs
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### being enabled.
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###
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option MEMORY_HOLE=0
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#
|
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###
|
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### Enable both fixed and variable MTRRS
|
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### When we setup MTRRs in mtrr.c
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###
|
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### We must setup the fixed mtrrs or we confuse SMP secondary
|
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### processor identification
|
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###
|
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option ENABLE_FIXED_AND_VARIABLE_MTRRS=1
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||||
#
|
||||
###
|
||||
### Clean up the motherboard id strings
|
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###
|
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option MAINBOARD_PART_NUMBER="Solo7"
|
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option MAINBOARD_VENDOR="AMD"
|
||||
#
|
||||
###
|
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### Let Assembly code know where on the pci bus the AMD southbridge is
|
||||
###
|
||||
option AMD8111_DEV=0x3800
|
||||
#
|
||||
###
|
||||
### Call the final_mainboard_fixup function
|
||||
###
|
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option FINAL_MAINBOARD_FIXUP=1
|
||||
#
|
||||
###
|
||||
### Figure out which type of linuxBIOS image to build
|
||||
### If we aren't a fallback image we must be a normal image
|
||||
### This is useful for optional includes
|
||||
###
|
||||
default USE_FALLBACK_IMAGE=0
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option USE_NORMAL_IMAGE=(! USE_FALLBACK_IMAGE)
|
||||
#
|
||||
####
|
||||
#### LinuxBIOS layout values
|
||||
####
|
||||
#
|
||||
### ROM_SIZE is the size of boot ROM that this board will use.
|
||||
option ROM_SIZE=262144
|
||||
#
|
||||
### ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
|
||||
option ROM_IMAGE_SIZE=65535
|
||||
#
|
||||
###
|
||||
### Use a small 8K stack
|
||||
###
|
||||
option STACK_SIZE=0x2000
|
||||
#
|
||||
###
|
||||
### Use a small 8K heap
|
||||
###
|
||||
option HEAP_SIZE=0x2000
|
||||
#
|
||||
###
|
||||
### Only use the option table in a normal image
|
||||
###
|
||||
option USE_OPTION_TABLE=!USE_FALLBACK_IMAGE
|
||||
#
|
||||
###
|
||||
### Compute the location and size of where this firmware image
|
||||
### (linuxBIOS plus bootloader) will live in the boot rom chip.
|
||||
###
|
||||
default FALLBACK_SIZE=65536
|
||||
if USE_FALLBACK_IMAGE
|
||||
option ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
option ROM_SECTION_OFFSET= (ROM_SIZE - FALLBACK_SIZE)
|
||||
end
|
||||
if USE_NORMAL_IMAGE
|
||||
option ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
option ROM_SECTION_OFFSET= 0
|
||||
end
|
||||
#
|
||||
###
|
||||
### Compute the start location and size size of
|
||||
### The linuxBIOS bootloader.
|
||||
###
|
||||
option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
option CONFIG_ROM_STREAM = 1
|
||||
#
|
||||
###
|
||||
### Compute where this copy of linuxBIOS will start in the boot rom
|
||||
###
|
||||
option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE)
|
||||
#
|
||||
###
|
||||
### Compute a range of ROM that can cached to speed up linuxBIOS,
|
||||
### execution speed.
|
||||
###
|
||||
##expr XIP_ROM_SIZE = 65536
|
||||
##expr XIP_ROM_BASE = _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE
|
||||
##option XIP_ROM_SIZE=65536
|
||||
##option XIP_ROM_BASE=0xffff0000
|
||||
#
|
||||
## XIP_ROM_SIZE && XIP_ROM_BASE values that work.
|
||||
##option XIP_ROM_SIZE=0x8000
|
||||
##option XIP_ROM_BASE=0xffff8000
|
||||
#
|
||||
###
|
||||
### Compute where the SMP startup code needs to live
|
||||
### FIXME I don't see how to make this work for the normal image....
|
||||
###
|
||||
option START_CPU_SEG=0xf0000
|
||||
#
|
||||
#
|
||||
###
|
||||
### Set all of the defaults for an x86 architecture
|
||||
###
|
||||
#
|
||||
#
|
||||
###
|
||||
### Build the objects we have code for in this directory.
|
||||
###
|
||||
##object mainboard.o
|
||||
driver mainboard.o
|
||||
object static_devices.o
|
||||
if HAVE_MP_TABLE object mptable.o end
|
||||
if HAVE_PIRQ_TABLE object irq_tables.o end
|
||||
#
|
||||
arch i386 end
|
||||
cpu k8 end
|
||||
#
|
||||
option DEBUG=1
|
||||
default USE_FALLBACK_IMAGE=1
|
||||
option A=(1+2)
|
||||
option B=0xa
|
||||
#
|
||||
###
|
||||
### Build our 16 bit and 32 bit linuxBIOS entry code
|
||||
###
|
||||
mainboardinit cpu/i386/entry16.inc
|
||||
mainboardinit cpu/i386/entry32.inc
|
||||
ldscript /cpu/i386/entry16.lds
|
||||
ldscript /cpu/i386/entry32.lds
|
||||
#
|
||||
###
|
||||
### Build our reset vector (This is where linuxBIOS is entered)
|
||||
###
|
||||
if USE_FALLBACK_IMAGE
|
||||
mainboardinit cpu/i386/reset16.inc
|
||||
ldscript /cpu/i386/reset16.lds
|
||||
end
|
||||
|
||||
if USE_NORMAL_IMAGE
|
||||
mainboardinit cpu/i386/reset32.inc
|
||||
ldscript /cpu/i386/reset32.lds
|
||||
end
|
||||
#
|
||||
#### Should this be in the northbridge code?
|
||||
#mainboardinit archi386/lib/cpu_reset.inc
|
||||
#
|
||||
###
|
||||
### Include an id string (For safe flashing)
|
||||
###
|
||||
mainboardinit arch/i386/lib/id.inc
|
||||
ldscript /arch/i386/lib/id.lds
|
||||
#
|
||||
####
|
||||
#### This is the early phase of linuxBIOS startup
|
||||
#### Things are delicate and we test to see if we should
|
||||
#### failover to another image.
|
||||
####
|
||||
option MAX_REBOOT_CNT=2
|
||||
##ldscript arch/i386/lib/failover.lds USE_FALLBACK_IMAGE
|
||||
#
|
||||
###
|
||||
### Setup our mtrrs
|
||||
###
|
||||
mainboardinit cpu/k8/earlymtrr.inc
|
||||
#
|
||||
#
|
||||
###
|
||||
### Only the bootstrap cpu makes it here.
|
||||
### Failover if we need to
|
||||
###
|
||||
#
|
||||
if USE_FALLBACK_IMAGE
|
||||
mainboardinit southbridge/amd/amd8111/cmos_boot_failover.inc
|
||||
end
|
||||
#
|
||||
####
|
||||
#### O.k. We aren't just an intermediary anymore!
|
||||
####
|
||||
#
|
||||
###
|
||||
### When debugging disable the watchdog timer
|
||||
###
|
||||
##option MAXIMUM_CONSOLE_LOGLEVEL=7
|
||||
#default MAXIMUM_CONSOLE_LOGLEVEL=7
|
||||
#option DISABLE_WATCHDOG= (MAXIMUM_CONSOLE_LOGLEVEL >= 8)
|
||||
#if DISABLE_WATCHDOG
|
||||
# mainboardinit southbridgeamd/amd8111/disable_watchdog.inc
|
||||
#end
|
||||
#
|
||||
###
|
||||
### Setup the serial port
|
||||
###
|
||||
#mainboardinit superiowinbond/w83627hf/setup_serial.inc
|
||||
mainboardinit pc80/serial.inc
|
||||
mainboardinit arch/i386/lib/console.inc
|
||||
if USE_FALLBACK_IMAGE mainboardinit archi386/lib/noop_failover.inc end
|
||||
#
|
||||
###
|
||||
### Romcc output
|
||||
###
|
||||
#makerule ./failover.E dep "$(MAINBOARD)/failover.c" act "$(CPP) -I$(TOP)/src $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failever.E"
|
||||
#makerule ./failover.inc dep "./romcc ./failover.E" act "./romcc -O ./failover.E > failover.inc"
|
||||
#mainboardinit .failover.inc
|
||||
makerule ./auto.E dep "$(MAINBOARD)/auto.c" act "$(CPP) -I$(TOP)/src -$(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E"
|
||||
makerule ./auto.inc dep "./romcc ./auto.E" act "./romcc -O ./auto.E > auto.inc"
|
||||
mainboardinit ./auto.inc
|
||||
#
|
||||
###
|
||||
### Setup RAM
|
||||
###
|
||||
mainboardinit ram/ramtest.inc
|
||||
mainboardinit southbridge/amd/amd8111/smbus.inc
|
||||
mainboardinit sdram/generic_dump_spd.inc
|
||||
#
|
||||
###
|
||||
### Include the secondary Configuration files
|
||||
###
|
||||
northbridge amd/amdk8
|
||||
end
|
||||
southbridge amd/amd8111
|
||||
end
|
||||
#mainboardinit archi386/smp/secondary.inc
|
||||
superio NSC/pc87360
|
||||
register "com1={1} com2={0} floppy=1 lpt=1 keyboard=1"
|
||||
end
|
||||
dir /pc80
|
||||
##dir /src/superio/winbond/w83627hf
|
||||
cpu p5 end
|
||||
cpu p6 end
|
||||
cpu k7 end
|
||||
cpu k8 end
|
||||
|
|
@ -0,0 +1,2 @@
|
|||
object northbridge.o
|
||||
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
#object keyboard.o
|
||||
object mc146818rtc.o
|
||||
#object isa-dma.o
|
||||
#object i8259.o CONFIG_I8259
|
||||
#object udelay_timer2.o CONFIG_UDELAY_TIMER2
|
||||
#object beep.o CONFIG_BEEP
|
||||
#object vga_load_regs.o VIDEO_CONSOLE
|
||||
#object font_8x16.o VIDEO_CONSOLE
|
||||
#object vga_set_mode.o VIDEO_CONSOLE
|
||||
#object vga_load_pcx.o VIDEO_CONSOLE
|
||||
#dir ide
|
||||
|
||||
|
|
@ -0,0 +1,4 @@
|
|||
driver amd8111_usb.o
|
||||
driver amd8111_lpc.o
|
||||
driver amd8111_ide.o
|
||||
driver amd8111_acpi.o
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
if CONFIG_ROM_STREAM
|
||||
object rom_stream.o
|
||||
end
|
||||
|
|
@ -0,0 +1 @@
|
|||
object superio.o
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
|
||||
struct superio_NSC_pc87360_config {
|
||||
typedef struct com_ports com1;
|
||||
typedef struct lpt_ports lpt;
|
||||
};
|
||||
Loading…
Reference in New Issue