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The LAN chip-set on the Technexion TIM-5690 is enabled by hardware and 

does not need any handling in software.

Signed-off-by: Libra Li <libra.li@technexion.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4822 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Libra Li 2009-10-22 02:54:25 +00:00 committed by Carl-Daniel Hailfinger
parent b8f73ed14d
commit 99bc4514c2
2 changed files with 0 additions and 35 deletions
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32
src/mainboard/technexion/tim5690/mainboard.c
View File

@ -47,37 +47,6 @@ extern void lb_add_memory_range(struct lb_memory *mem, uint32_t type,
uint64_t uma_memory_base, uma_memory_size;
/***************************************************
* This board, the TIM-5690 has two Marvel 88e5056 PCI-E
* 10/100/1000 chips on board.
* Both of their pin PERSTn pins are connected to GPIO 5 of the
* SB600 southbridge.
****************************************************/
static void enable_onboard_nic()
{
u8 byte;
device_t sm_dev;
printk_info("enable_onboard_nic.\n");
sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
byte = pci_read_config8(sm_dev, 0x9a);
byte |= ( 1 << 7);
pci_write_config8(sm_dev, 0x9a, byte);
byte=pm_ioread(0x59);
byte &= ~( 1<< 5);
pm_iowrite(0x59,byte);
byte = pci_read_config8(sm_dev, 0xA8);
byte |= (1 << 1); //set bit 1 to high
pci_write_config8(sm_dev, 0xA8, byte);
}
/* set thermal config
*/
static void set_thermal_config()
@ -193,7 +162,6 @@ void tim5690_enable(device_t dev)
uma_memory_base = 0x38000000; /* 1GB system memory supposed */
#endif
enable_onboard_nic();
set_thermal_config();
}

3
targets/technexion/tim5690/Config.lb
View File

@ -8,9 +8,6 @@ option CONFIG_ROM_SIZE = (1024*512)
#option CONFIG_ROM_SIZE = (1024*1024*2)
#option CONFIG_ROM_SIZE = (1024*1024*4)
option CONFIG_COMPRESSED_PAYLOAD_LZMA=1
romimage "normal"
option CONFIG_USE_FALLBACK_IMAGE=0
option CONFIG_ROM_IMAGE_SIZE=0x20000