From 99d258afcbb72c187c6aed6be3a0df6aac35722f Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Fri, 5 Oct 2018 11:04:01 -0700 Subject: [PATCH] soc/intel/skylake: Set PCIEXPWAK_DIS if WAKE# pin is not enabled This change sets PCIEXPWAK_DIS in PM1_EN register if WAKE# pin is not enabled on the platform. This is required to prevent unnecessary wakes if the WAKE# pin remains not connected on the platform. Function to set PCIEXPWAK_DIS gets called in normal boot path (BS_PAYLOAD_LOAD) as well as S3 resume path (BS_OS_RESUME). BUG=b:117284700 TEST=Verified that no spurious wakes are observed on nocturne. Change-Id: Iea93baffc9bb703c0ffedacafc6a9a9410c7ebfe Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/28939 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Nick Vaccaro Reviewed-by: Subrata Banik --- src/soc/intel/skylake/pmc.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c index a2623d953d..6b673bebd9 100644 --- a/src/soc/intel/skylake/pmc.c +++ b/src/soc/intel/skylake/pmc.c @@ -225,4 +225,29 @@ static void pm1_enable_pwrbtn_smi(void *unused) BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, pm1_enable_pwrbtn_smi, NULL); +/* + * Check if WAKE# pin is enabled based on DSX_EN_WAKE_PIN setting in + * deep_sx_config. If WAKE# pin is not enabled, then PCI Express Wake Disable + * bit needs to be set in PM1_EN to avoid unnecessary wakes caused by WAKE# + * pin. + */ +static void pm1_handle_wake_pin(void *unused) +{ + struct device *dev = SA_DEV_ROOT; + + if (!dev || !dev->chip_info) + return; + + const config_t *conf = dev->chip_info; + + /* If WAKE# pin is enabled, bail out early. */ + if (conf->deep_sx_config & DSX_EN_WAKE_PIN) + return; + + pmc_update_pm1_enable(PCIEXPWAK_DIS); +} + +BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, pm1_handle_wake_pin, NULL); +BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_EXIT, pm1_handle_wake_pin, NULL); + #endif