From 99edff944c4e2a4c18fdf104138a10e77a03c324 Mon Sep 17 00:00:00 2001
From: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Date: Thu, 16 Jun 2022 14:35:33 +0800
Subject: [PATCH] soc/intel/denverton_ns: Define macro TOTAL_PADS

Define total GPIO pins as TOTAL_PADS.

Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: I220b6f1a968667a68c30c7287ab5af1912959e3e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65166
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
---
 src/soc/intel/denverton_ns/include/soc/gpio_defs.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/soc/intel/denverton_ns/include/soc/gpio_defs.h b/src/soc/intel/denverton_ns/include/soc/gpio_defs.h
index 5c7ecde12d..4bcafaa520 100644
--- a/src/soc/intel/denverton_ns/include/soc/gpio_defs.h
+++ b/src/soc/intel/denverton_ns/include/soc/gpio_defs.h
@@ -16,6 +16,9 @@
 #define V_PCH_GPIO_SC1_PAD_MAX 42
 #define V_PCH_GPIO_GROUP_MAX 4
 
+#define TOTAL_PADS	(V_PCH_GPIO_NC_PAD_MAX + V_PCH_GPIO_SC_DFX_PAD_MAX\
+			 + V_PCH_GPIO_SC0_PAD_MAX + V_PCH_GPIO_SC1_PAD_MAX)
+
 //
 // GPIO Community 0 Private Configuration Registers
 //