cpu/amd/family_10h-family_15h: Remove variable set but not used
Change-Id: Ifc63ec5b588f8edcec5eda343ec9694332845045 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33006 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -986,7 +986,6 @@ void cpuSetAMDMSR(uint8_t node_id)
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uint8_t nvram;
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uint8_t nvram;
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u32 platform;
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u32 platform;
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uint64_t revision;
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uint64_t revision;
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uint8_t enable_c_states;
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uint8_t enable_cpb;
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uint8_t enable_cpb;
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printk(BIOS_DEBUG, "cpuSetAMDMSR ");
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printk(BIOS_DEBUG, "cpuSetAMDMSR ");
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@ -1062,21 +1061,16 @@ void cpuSetAMDMSR(uint8_t node_id)
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}
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}
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if (revision & (AMD_DR_Ex | AMD_FAM15_ALL)) {
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if (revision & (AMD_DR_Ex | AMD_FAM15_ALL)) {
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enable_c_states = 0;
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if (CONFIG(HAVE_ACPI_TABLES))
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if (CONFIG(HAVE_ACPI_TABLES))
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if (get_option(&nvram, "cpu_c_states") == CB_SUCCESS)
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if ((get_option(&nvram, "cpu_c_states") == CB_SUCCESS) &&
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enable_c_states = !!nvram;
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(nvram)) {
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if (enable_c_states) {
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/* Set up the C-state base address */
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/* Set up the C-state base address */
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msr_t c_state_addr_msr;
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msr_t c_state_addr_msr;
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c_state_addr_msr = rdmsr(MSR_CSTATE_ADDRESS);
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c_state_addr_msr = rdmsr(MSR_CSTATE_ADDRESS);
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c_state_addr_msr.lo = ACPI_CPU_P_LVL2; /* CstateAddr = ACPI_CPU_P_LVL2 */
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c_state_addr_msr.lo = ACPI_CPU_P_LVL2;
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wrmsr(MSR_CSTATE_ADDRESS, c_state_addr_msr);
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wrmsr(MSR_CSTATE_ADDRESS, c_state_addr_msr);
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}
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}
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}
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}
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#else
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enable_c_states = 0;
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#endif
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#endif
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if (revision & AMD_FAM15_ALL) {
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if (revision & AMD_FAM15_ALL) {
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