mb/asrock/h110m: configure SuperIO Deep Sleep

Change-Id: I10766ffda67bdc830ab01436ebd0578c79f1ec70
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36376
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Maxim Polyakov 2019-10-27 15:07:00 +03:00 committed by Patrick Georgi
parent db8f9229b1
commit 9a100b5c1d
1 changed files with 3 additions and 3 deletions

View File

@ -415,10 +415,10 @@ chip soc/intel/skylake
device pnp 2e.14 off end # SVID, Port 80 UART
device pnp 2e.16 off end # DS5
device pnp 2e.116 off end # DS3
device pnp 2e.316 off end # PCHDSW
device pnp 2e.316 on end # PCHDSW
device pnp 2e.416 off end # DSWWOPT
device pnp 2e.516 off end # DS3OPT
device pnp 2e.616 off end # DSDSS
device pnp 2e.516 on end # DS3OPT
device pnp 2e.616 on end # DSDSS
device pnp 2e.716 off end # DSPU
end # superio/nuvoton/nct6791d
chip drivers/pc80/tpm