From 9a2ccc4e716343f7d1558dfdc90425229e8e8884 Mon Sep 17 00:00:00 2001 From: Rajesh Patil Date: Fri, 18 Jun 2021 14:34:45 +0530 Subject: [PATCH] src/mainboard/herobrine: Load respective QUP FW for I2C and SPI Loading QUP FW as per herobrine and piglin configuration for I2C, SPI and UART. As part of the code clean up, update the header files of the QUP drivers with the correct path. BUG=b:182963902 TEST=Validated on qualcomm sc7280 development board. Signed-off-by: Rajesh Patil Change-Id: Ic218c6a91ffc4484830446d707d1f3403e2dc46b Reviewed-on: https://review.coreboot.org/c/coreboot/+/57672 Tested-by: build bot (Jenkins) Reviewed-by: Shelley Chen --- src/mainboard/google/herobrine/mainboard.c | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/src/mainboard/google/herobrine/mainboard.c b/src/mainboard/google/herobrine/mainboard.c index 6f8d19d8d1..55b1c5e575 100644 --- a/src/mainboard/google/herobrine/mainboard.c +++ b/src/mainboard/google/herobrine/mainboard.c @@ -9,6 +9,9 @@ #include #include #include +#include +#include +#include static void configure_sdhci(void) { @@ -25,6 +28,26 @@ static void mainboard_init(struct device *dev) /* Configure clock for SD card */ clock_configure_sdcc(2, 50 * MHz); configure_sdhci(); + + /* + * When coreboot firmware disables serial output, + * we still need to load console UART QUP FW for OS. + */ + if (!CONFIG(CONSOLE_SERIAL)) + qupv3_se_fw_load_and_init(QUPV3_0_SE5, SE_PROTOCOL_UART, FIFO); + + qupv3_se_fw_load_and_init(QUPV3_1_SE5, SE_PROTOCOL_I2C, MIXED); /* Touch I2C */ + qupv3_se_fw_load_and_init(QUPV3_0_SE7, SE_PROTOCOL_UART, FIFO); /* BT UART */ + +#if CONFIG(BOARD_GOOGLE_HEROBRINE) + qupv3_se_fw_load_and_init(QUPV3_0_SE0, SE_PROTOCOL_I2C, MIXED); /* Audio I2C */ + qupv3_se_fw_load_and_init(QUPV3_0_SE1, SE_PROTOCOL_I2C, MIXED); /* Trackpad I2C */ + qupv3_se_fw_load_and_init(QUPV3_1_SE3, SE_PROTOCOL_SPI, MIXED); /* Fingerprint SPI */ +#elif CONFIG(BOARD_GOOGLE_PIGLIN) + qupv3_se_fw_load_and_init(QUPV3_0_SE1, SE_PROTOCOL_I2C, GSI); /* APPS I2C */ + qupv3_se_fw_load_and_init(QUPV3_1_SE4, SE_PROTOCOL_SPI, MIXED); /* ESIM SPI */ + qupv3_se_fw_load_and_init(QUPV3_1_SE6, SE_PROTOCOL_SPI, MIXED); /* Fingerprint SPI */ +#endif } static void mainboard_enable(struct device *dev)