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soc/intel/apollolake: add new dimm info saving API 

The current call for saving dimm info passed the lpddr4_cfg and
memory sku id. In order to prepare decoupling the part number
from lpddr4_cfg provide a new API, save_lpddr4_dimm_info_part_num(),
which explicitly takes the part number. The previous API now
uses the new one internally.

BUG=b:112203105

Change-Id: Ieadf452b6daa3231a0c5e3be61b0603b40d0fff2
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/27944
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Aaron Durbin 2018-08-07 12:04:21 -06:00
parent 577e41c06e
commit 9a30c7289f
3 changed files with 43 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/soc/intel/apollolake/include/soc/meminit.h
View File

@ -131,7 +131,11 @@ struct lpddr4_cfg {
*/
void meminit_lpddr4_by_sku(FSP_M_CONFIG *cfg,
const struct lpddr4_cfg *lpcfg, size_t sku_id);
/* One of the two below needs to be called. If one is obtaining the part
* number out of band from the lpddr_cfg then the part_num variant will
* suffice. */
void save_lpddr4_dimm_info(const struct lpddr4_cfg *lpcfg, size_t mem_sku);
void save_lpddr4_dimm_info_part_num(const char *dram_part_num);
/* Retrieve the amount of memory configured in the system in MiB. It's only
* valid during romstage. */

27
src/soc/intel/apollolake/meminit_util_apl.c
View File

@ -27,7 +27,7 @@
0x88, 0xc3, 0xee, 0xe8, 0xc4, 0x9e, 0xfb, 0x89 \
}
void save_lpddr4_dimm_info(const struct lpddr4_cfg *lp4cfg, size_t mem_sku)
void save_lpddr4_dimm_info_part_num(const char *dram_part_num)
{
int channel, dimm, dimm_max, index;
size_t hob_size;
@ -39,11 +39,8 @@ void save_lpddr4_dimm_info(const struct lpddr4_cfg *lp4cfg, size_t mem_sku)
const uint8_t smbios_memory_info_guid[16] =
FSP_SMBIOS_MEMORY_INFO_GUID;
if (mem_sku >= lp4cfg->num_skus) {
printk(BIOS_ERR, "Too few LPDDR4 SKUs: 0x%zx/0x%zx\n",
mem_sku, lp4cfg->num_skus);
return;
}
if (!dram_part_num)
dram_part_num = "Unknown";
/* Locate the memory info HOB */
memory_info_hob = fsp_find_extension_hob_by_guid(
@ -90,8 +87,8 @@ void save_lpddr4_dimm_info(const struct lpddr4_cfg *lp4cfg, size_t mem_sku)
memory_info_hob->MemoryFrequencyInMHz,
channel_info->ChannelId,
src_dimm->DimmId,
lp4cfg->skus[mem_sku].part_num,
strlen(lp4cfg->skus[mem_sku].part_num),
dram_part_num,
strlen(dram_part_num),
memory_info_hob->DataWidth);
index++;
}
@ -99,3 +96,17 @@ void save_lpddr4_dimm_info(const struct lpddr4_cfg *lp4cfg, size_t mem_sku)
mem_info->dimm_cnt = index;
printk(BIOS_DEBUG, "%d DIMMs found\n", mem_info->dimm_cnt);
}
void save_lpddr4_dimm_info(const struct lpddr4_cfg *lp4cfg, size_t mem_sku)
{
const char *part_num = NULL;
if (mem_sku >= lp4cfg->num_skus) {
printk(BIOS_ERR, "Too few LPDDR4 SKUs: 0x%zx/0x%zx\n",
mem_sku, lp4cfg->num_skus);
} else {
part_num = lp4cfg->skus[mem_sku].part_num;
}
save_lpddr4_dimm_info_part_num(part_num);
}

28
src/soc/intel/apollolake/meminit_util_glk.c
View File

@ -27,7 +27,7 @@
0x88, 0xc3, 0xee, 0xe8, 0xc4, 0x9e, 0xfb, 0x89 \
}
void save_lpddr4_dimm_info(const struct lpddr4_cfg *lp4cfg, size_t mem_sku)
void save_lpddr4_dimm_info_part_num(const char *dram_part_num)
{
int channel, dimm, dimm_max, index, node;
size_t hob_size;
@ -40,11 +40,9 @@ void save_lpddr4_dimm_info(const struct lpddr4_cfg *lp4cfg, size_t mem_sku)
const uint8_t smbios_memory_info_guid[16] =
FSP_SMBIOS_MEMORY_INFO_GUID;
if (mem_sku >= lp4cfg->num_skus) {
printk(BIOS_ERR, "Too few LPDDR4 SKUs: 0x%zx/0x%zx\n",
mem_sku, lp4cfg->num_skus);
return;
}
if (!dram_part_num)
dram_part_num = "Unknown";
/* Locate the memory info HOB */
memory_info_hob = fsp_find_extension_hob_by_guid(
smbios_memory_info_guid,
@ -95,8 +93,8 @@ void save_lpddr4_dimm_info(const struct lpddr4_cfg *lp4cfg, size_t mem_sku)
memory_info_hob->ConfiguredMemoryClockSpeed,
channel_info->ChannelId,
src_dimm->DimmId,
lp4cfg->skus[mem_sku].part_num,
strlen(lp4cfg->skus[mem_sku].part_num),
dram_part_num,
strlen(dram_part_num),
memory_info_hob->DataWidth);
index++;
}
@ -105,3 +103,17 @@ void save_lpddr4_dimm_info(const struct lpddr4_cfg *lp4cfg, size_t mem_sku)
mem_info->dimm_cnt = index;
printk(BIOS_DEBUG, "%d DIMMs found\n", mem_info->dimm_cnt);
}
void save_lpddr4_dimm_info(const struct lpddr4_cfg *lp4cfg, size_t mem_sku)
{
const char *part_num = NULL;
if (mem_sku >= lp4cfg->num_skus) {
printk(BIOS_ERR, "Too few LPDDR4 SKUs: 0x%zx/0x%zx\n",
mem_sku, lp4cfg->num_skus);
} else {
part_num = lp4cfg->skus[mem_sku].part_num;
}
save_lpddr4_dimm_info_part_num(part_num);
}