console: Drop extra uart_init()

This call is already in console_init().

Change-Id: Ie0cb3595af514e37efac5ac5d474f52ba551bf22
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5140
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

src/mainboard/advansus/a785e-i/romstage.c

@@ -102,7 +102,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	w83627hf_set_clksel_48(PNP_DEV(0x2e, 0));
 	w83627hf_enable_serial(0, CONFIG_TTYS0_BASE);
 
-	uart_init();
 	console_init();
 	printk(BIOS_DEBUG, "\n");
 

src/mainboard/amd/dinar/romstage.c

@@ -70,7 +70,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		}
 
 		post_code(0x31);
-		uart_init();
 		console_init();
 
 		/*

src/mainboard/amd/torpedo/romstage.c

@@ -62,7 +62,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		kbc1100_early_init(CONFIG_SIO_PORT);
 
 		post_code(0x32);
-		uart_init();
 		post_code(0x33);
 		console_init();
 	}

src/mainboard/asus/m5a88-v/romstage.c

@@ -101,7 +101,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	sb800_clk_output_48Mhz();
 
 	it8721f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	printk(BIOS_DEBUG, "\n");
 

src/mainboard/avalue/eax-785e/romstage.c

@@ -102,7 +102,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	w83627hf_set_clksel_48(PNP_DEV(CONFIG_SIO_PORT, 0));
 	w83627hf_enable_serial(0, CONFIG_TTYS0_BASE);
 
-	uart_init();
 	console_init();
 	printk(BIOS_DEBUG, "\n");
 

src/mainboard/supermicro/h8qgi/romstage.c

@@ -52,7 +52,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	sb7xx_51xx_disable_wideio(0);
 	post_code(0x34);
 
-	uart_init();
 	post_code(0x35);
 	console_init();
 

src/mainboard/supermicro/h8scm/romstage.c

@@ -57,7 +57,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	sb7xx_51xx_disable_wideio(0);
 	post_code(0x34);
 
-	uart_init();
 	post_code(0x35);
 	console_init();
 

src/mainboard/supermicro/x6dhr_ig2/romstage.c

@@ -64,7 +64,6 @@ static void main(unsigned long bist)
 
 	w83627hf_set_clksel_48(DUMMY_DEV);
 	w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/tyan/s8226/romstage.c

@@ -58,7 +58,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	sb7xx_51xx_disable_wideio(0);
 	post_code(0x34);
 
-	uart_init();
 	post_code(0x35);
 	console_init();