northbridge/intel/i440bx: Move NB macro to i440bx.h

This move makes the NB macro more widely available,
in preparation for implementing get_top_of_ram().

Change-Id: Icd8e82cfdfdccb662b2139d0e5d1d5af72cbae7f
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/20675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Keith Hui 2017-07-20 21:00:56 -04:00 committed by Martin Roth
parent 3f6421e1fa
commit 9aa45e6952
2 changed files with 6 additions and 6 deletions

View File

@ -86,4 +86,6 @@
#define DRTC 0xe8 /* DRAM Read Thermal Throttling Control (0x000..000). */
#define BUFFC 0xf0 /* Buffer Control Register (0x0000). */
#define NB PCI_DEV(0, 0, 0)
#endif /* NORTHBRIDGE_INTEL_I440BX_I440BX_H */

View File

@ -2,7 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2008 Uwe Hermann <uwe@hermann-uwe.de>
* Copyright (C) 2010 Keith Hui <buurin@gmail.com>
* Copyright (C) 2010,2017 Keith Hui <buurin@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -25,11 +25,9 @@
#include "i440bx.h"
#include "raminit.h"
/*-----------------------------------------------------------------------------
Macros and definitions.
-----------------------------------------------------------------------------*/
#define NB PCI_DEV(0, 0, 0)
/*
* Macros and definitions
*/
/* Debugging macros. */
#if IS_ENABLED(CONFIG_DEBUG_RAM_SETUP)