soc/amd/picasso: Update the AMD firmware in RW-A & RW-B regions

The AMD firmware package created by amdfwtool contains pointers to the
various binaries and settings.  When these are moved to the RW-A & RW-B
regions, the packages need to be recreated for the new addresses.

TEST=Build & boot trembyle. See that we're booting from the correct
region.
BUG=b:158124527

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I0d50968b6ab4b3ab51f8c9bc66c56e141ef728ed
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42225
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Martin Roth 2020-06-04 21:31:41 -06:00 committed by Martin Roth
parent 6303671189
commit 9aa8d11885
2 changed files with 114 additions and 54 deletions

View File

@ -504,4 +504,32 @@ config VBOOT_STARTS_BEFORE_BOOTBLOCK
Runs verstage on the PSP. Only available on Runs verstage on the PSP. Only available on
certain Chrome OS branded parts from AMD. certain Chrome OS branded parts from AMD.
if VBOOT_SLOTS_RW_AB && VBOOT_STARTS_BEFORE_BOOTBLOCK
config RWA_REGION_ONLY
string
default "apu/amdfw_a"
help
Add a space-delimited list of filenames that should only be in the
RW-A section.
config RWB_REGION_ONLY
string
default "apu/amdfw_b"
help
Add a space-delimited list of filenames that should only be in the
RW-B section.
config PICASSO_FW_A_POSITION
hex
help
Location of the AMD firmware in the RW_A region
config PICASSO_FW_B_POSITION
hex
help
Location of the AMD firmware in the RW_B region
endif # VBOOT_SLOTS_RW_AB && VBOOT_STARTS_BEFORE_BOOTBLOCK
endif # SOC_AMD_PICASSO endif # SOC_AMD_PICASSO

View File

@ -314,6 +314,59 @@ OPT_MP2CFG_FILE=$(call add_opt_prefix, $(PSP_MP2CFG_FILE), --mp2-config)
OPT_PSP_SHAREDMEM_BASE=$(call add_opt_prefix, $(PSP_SHAREDMEM_BASE), --sharedmem) OPT_PSP_SHAREDMEM_BASE=$(call add_opt_prefix, $(PSP_SHAREDMEM_BASE), --sharedmem)
OPT_PSP_SHAREDMEM_SIZE=$(call add_opt_prefix, $(PSP_SHAREDMEM_SIZE), --sharedmem-size) OPT_PSP_SHAREDMEM_SIZE=$(call add_opt_prefix, $(PSP_SHAREDMEM_SIZE), --sharedmem-size)
AMDFW_COMMON_ARGS=$(OPT_AMD_PUBKEY_FILE) \
$(OPT_PSPBTLDR_FILE) \
$(OPT_PSPSCUREOS_FILE) \
$(OPT_PSP_SEC_DBG_KEY_FILE) \
$(OPT_SMUFW1_SUB2_FILE) \
$(OPT_SMUFW2_SUB2_FILE) \
$(OPT_SMUFW1_SUB1_FILE) \
$(OPT_SMUFW2_SUB1_FILE) \
$(OPT_PSP_APCB_FILES) \
$(OPT_APOB_ADDR) \
--apob-nv-size $(shell printf "0x%x" \
$(shell cat $(obj)/fmap.fmd | $(_GET_APOBNV_SIZE))) \
--apob-nv-base $(shell printf "0x%x" $(call int-add, \
$(shell cat $(obj)/fmap.fmd | $(_GET_FLASH_BASE)) \
$(shell cat $(obj)/fmap.fmd | $(_GET_BIOS_REG_BASE)) \
$(shell cat $(obj)/fmap.fmd | $(_GET_APOBNV_BASE)))) \
$(OPT_PSP_BIOSBIN_FILE) \
$(OPT_PSP_BIOSBIN_DEST) \
$(OPT_PSP_BIOSBIN_SIZE) \
$(OPT_PSP_SOFTFUSE) \
$(OPT_PSP_PMUI_FILE1) \
$(OPT_PSP_PMUI_FILE2) \
$(OPT_PSP_PMUI_FILE3) \
$(OPT_PSP_PMUI_FILE4) \
$(OPT_PSP_PMUD_FILE1) \
$(OPT_PSP_PMUD_FILE2) \
$(OPT_PSP_PMUD_FILE3) \
$(OPT_PSP_PMUD_FILE4) \
$(OPT_MP2CFG_FILE) \
$(OPT_ABL0_FILE) \
$(OPT_ABL1_FILE) \
$(OPT_ABL2_FILE) \
$(OPT_ABL3_FILE) \
$(OPT_ABL4_FILE) \
$(OPT_ABL5_FILE) \
$(OPT_ABL6_FILE) \
$(OPT_ABL7_FILE) \
$(OPT_WHITELIST_FILE) \
$(OPT_SECG1_FILE) \
$(OPT_SECG2_FILE) \
$(OPT_MP2FW1_FILE) \
$(OPT_MP2FW2_FILE) \
$(OPT_DRIVERS_FILE) \
$(OPT_PSP_S0I3_FILE) \
$(OPT_IKEK_FILE) \
$(OPT_SEC_DEBUG_FILE) \
$(OPT_VERSTAGE_FILE) \
$(OPT_PSP_SHAREDMEM_BASE) \
$(OPT_PSP_SHAREDMEM_SIZE) \
--combo-capable \
$(OPT_TOKEN_UNLOCK) \
--flashsize $(CONFIG_ROM_SIZE)
# Copy prebuild APCBs if they exist # Copy prebuild APCBs if they exist
$(obj)/APCB_%.bin: $(MAINBOARD_BLOBS_DIR)/APCB_%.bin $(obj)/APCB_%.bin: $(MAINBOARD_BLOBS_DIR)/APCB_%.bin
cp $< $@ cp $< $@
@ -397,59 +450,8 @@ $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \
rm -f $@ rm -f $@
@printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
$(AMDFWTOOL) \ $(AMDFWTOOL) \
$(OPT_AMD_PUBKEY_FILE) \ $(AMDFW_COMMON_ARGS) \
$(OPT_PSPBTLDR_FILE) \ --location $(shell printf "%#x" $(PICASSO_FWM_POSITION)) \
$(OPT_PSPSCUREOS_FILE) \
$(OPT_PSP_SEC_DBG_KEY_FILE) \
$(OPT_SMUFW1_SUB2_FILE) \
$(OPT_SMUFW2_SUB2_FILE) \
$(OPT_SMUFW1_SUB1_FILE) \
$(OPT_SMUFW2_SUB1_FILE) \
$(OPT_PSP_APCB_FILES) \
$(OPT_APOB_ADDR) \
--apob-nv-size $(shell printf "0x%x" \
$(shell cat $(obj)/fmap.fmd | $(_GET_APOBNV_SIZE))) \
--apob-nv-base $(shell printf "0x%x" $(call int-add, \
$(shell cat $(obj)/fmap.fmd | $(_GET_FLASH_BASE)) \
$(shell cat $(obj)/fmap.fmd | $(_GET_BIOS_REG_BASE)) \
$(shell cat $(obj)/fmap.fmd | $(_GET_APOBNV_BASE)))) \
$(OPT_PSP_BIOSBIN_FILE) \
$(OPT_PSP_BIOSBIN_DEST) \
$(OPT_PSP_BIOSBIN_SIZE) \
$(OPT_PSP_SOFTFUSE) \
$(OPT_PSP_PMUI_FILE1) \
$(OPT_PSP_PMUI_FILE2) \
$(OPT_PSP_PMUI_FILE3) \
$(OPT_PSP_PMUI_FILE4) \
$(OPT_PSP_PMUD_FILE1) \
$(OPT_PSP_PMUD_FILE2) \
$(OPT_PSP_PMUD_FILE3) \
$(OPT_PSP_PMUD_FILE4) \
$(OPT_MP2CFG_FILE) \
$(OPT_ABL0_FILE) \
$(OPT_ABL1_FILE) \
$(OPT_ABL2_FILE) \
$(OPT_ABL3_FILE) \
$(OPT_ABL4_FILE) \
$(OPT_ABL5_FILE) \
$(OPT_ABL6_FILE) \
$(OPT_ABL7_FILE) \
$(OPT_WHITELIST_FILE) \
$(OPT_SECG1_FILE) \
$(OPT_SECG2_FILE) \
$(OPT_MP2FW1_FILE) \
$(OPT_MP2FW2_FILE) \
$(OPT_DRIVERS_FILE) \
$(OPT_PSP_S0I3_FILE) \
$(OPT_IKEK_FILE) \
$(OPT_SEC_DEBUG_FILE) \
--combo-capable \
$(OPT_TOKEN_UNLOCK) \
$(OPT_VERSTAGE_FILE) \
$(OPT_PSP_SHAREDMEM_BASE) \
$(OPT_PSP_SHAREDMEM_SIZE) \
--flashsize $(CONFIG_ROM_SIZE) \
--location $(shell printf "0x%x" $(PICASSO_FWM_POSITION)) \
--output $@ --output $@
$(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS) $(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS)
@ -458,11 +460,41 @@ $(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS)
$(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \ $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \
--maxsize $(PSP_BIOSBIN_SIZE) --maxsize $(PSP_BIOSBIN_SIZE)
$(obj)/amdfw_a.rom: $(obj)/amdfw.rom
rm -f $@
@printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
$(AMDFWTOOL) \
$(AMDFW_COMMON_ARGS) \
--location $(shell printf "%#x" $(CONFIG_PICASSO_FW_A_POSITION)) \
--anywhere \
--output $@
$(obj)/amdfw_b.rom: $(obj)/amdfw.rom
rm -f $@
@printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
$(AMDFWTOOL) \
$(AMDFW_COMMON_ARGS) \
--location $(shell printf "%#x" $(CONFIG_PICASSO_FW_B_POSITION)) \
--anywhere \
--output $@
cbfs-files-y += apu/amdfw cbfs-files-y += apu/amdfw
apu/amdfw-file := $(obj)/amdfw.rom apu/amdfw-file := $(obj)/amdfw.rom
apu/amdfw-position := $(PICASSO_FWM_POSITION) apu/amdfw-position := $(PICASSO_FWM_POSITION)
apu/amdfw-type := raw apu/amdfw-type := raw
ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy)
cbfs-files-y += apu/amdfw_a
apu/amdfw_a-file := $(obj)/amdfw_a.rom
apu/amdfw_a-position := $(call strip_quotes, $(CONFIG_PICASSO_FW_A_POSITION))
apu/amdfw_a-type := raw
cbfs-files-y += apu/amdfw_b
apu/amdfw_b-file := $(obj)/amdfw_b.rom
apu/amdfw_b-position := $(call strip_quotes, $(CONFIG_PICASSO_FW_B_POSITION))
apu/amdfw_b-type := raw
endif
$(call strip_quotes,$(CONFIG_FSP_M_CBFS))-options := -b $(CONFIG_FSP_M_ADDR) $(call strip_quotes,$(CONFIG_FSP_M_CBFS))-options := -b $(CONFIG_FSP_M_ADDR)
cpu_microcode_bins += $(wildcard 3rdparty/amd_blobs/picasso/PSP/UcodePatch_*.bin) cpu_microcode_bins += $(wildcard 3rdparty/amd_blobs/picasso/PSP/UcodePatch_*.bin)