soc/amd/picasso: Update the AMD firmware in RW-A & RW-B regions
The AMD firmware package created by amdfwtool contains pointers to the various binaries and settings. When these are moved to the RW-A & RW-B regions, the packages need to be recreated for the new addresses. TEST=Build & boot trembyle. See that we're booting from the correct region. BUG=b:158124527 Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I0d50968b6ab4b3ab51f8c9bc66c56e141ef728ed Reviewed-on: https://review.coreboot.org/c/coreboot/+/42225 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Martin Roth
Martin Roth
parent
6303671189
commit
9aa8d11885
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@ -504,4 +504,32 @@ config VBOOT_STARTS_BEFORE_BOOTBLOCK
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Runs verstage on the PSP. Only available on
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certain Chrome OS branded parts from AMD.
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if VBOOT_SLOTS_RW_AB && VBOOT_STARTS_BEFORE_BOOTBLOCK
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config RWA_REGION_ONLY
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string
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default "apu/amdfw_a"
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help
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Add a space-delimited list of filenames that should only be in the
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RW-A section.
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config RWB_REGION_ONLY
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string
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default "apu/amdfw_b"
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help
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Add a space-delimited list of filenames that should only be in the
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RW-B section.
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config PICASSO_FW_A_POSITION
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hex
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help
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Location of the AMD firmware in the RW_A region
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config PICASSO_FW_B_POSITION
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hex
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help
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Location of the AMD firmware in the RW_B region
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endif # VBOOT_SLOTS_RW_AB && VBOOT_STARTS_BEFORE_BOOTBLOCK
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endif # SOC_AMD_PICASSO
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@ -314,6 +314,59 @@ OPT_MP2CFG_FILE=$(call add_opt_prefix, $(PSP_MP2CFG_FILE), --mp2-config)
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OPT_PSP_SHAREDMEM_BASE=$(call add_opt_prefix, $(PSP_SHAREDMEM_BASE), --sharedmem)
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OPT_PSP_SHAREDMEM_SIZE=$(call add_opt_prefix, $(PSP_SHAREDMEM_SIZE), --sharedmem-size)
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AMDFW_COMMON_ARGS=$(OPT_AMD_PUBKEY_FILE) \
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$(OPT_PSPBTLDR_FILE) \
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$(OPT_PSPSCUREOS_FILE) \
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$(OPT_PSP_SEC_DBG_KEY_FILE) \
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$(OPT_SMUFW1_SUB2_FILE) \
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$(OPT_SMUFW2_SUB2_FILE) \
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$(OPT_SMUFW1_SUB1_FILE) \
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$(OPT_SMUFW2_SUB1_FILE) \
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$(OPT_PSP_APCB_FILES) \
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$(OPT_APOB_ADDR) \
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--apob-nv-size $(shell printf "0x%x" \
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$(shell cat $(obj)/fmap.fmd | $(_GET_APOBNV_SIZE))) \
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--apob-nv-base $(shell printf "0x%x" $(call int-add, \
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$(shell cat $(obj)/fmap.fmd | $(_GET_FLASH_BASE)) \
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$(shell cat $(obj)/fmap.fmd | $(_GET_BIOS_REG_BASE)) \
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$(shell cat $(obj)/fmap.fmd | $(_GET_APOBNV_BASE)))) \
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$(OPT_PSP_BIOSBIN_FILE) \
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$(OPT_PSP_BIOSBIN_DEST) \
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$(OPT_PSP_BIOSBIN_SIZE) \
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$(OPT_PSP_SOFTFUSE) \
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$(OPT_PSP_PMUI_FILE1) \
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$(OPT_PSP_PMUI_FILE2) \
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$(OPT_PSP_PMUI_FILE3) \
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$(OPT_PSP_PMUI_FILE4) \
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$(OPT_PSP_PMUD_FILE1) \
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$(OPT_PSP_PMUD_FILE2) \
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$(OPT_PSP_PMUD_FILE3) \
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$(OPT_PSP_PMUD_FILE4) \
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$(OPT_MP2CFG_FILE) \
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$(OPT_ABL0_FILE) \
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$(OPT_ABL1_FILE) \
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$(OPT_ABL2_FILE) \
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$(OPT_ABL3_FILE) \
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$(OPT_ABL4_FILE) \
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$(OPT_ABL5_FILE) \
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$(OPT_ABL6_FILE) \
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$(OPT_ABL7_FILE) \
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$(OPT_WHITELIST_FILE) \
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$(OPT_SECG1_FILE) \
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$(OPT_SECG2_FILE) \
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$(OPT_MP2FW1_FILE) \
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$(OPT_MP2FW2_FILE) \
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$(OPT_DRIVERS_FILE) \
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$(OPT_PSP_S0I3_FILE) \
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$(OPT_IKEK_FILE) \
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$(OPT_SEC_DEBUG_FILE) \
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$(OPT_VERSTAGE_FILE) \
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$(OPT_PSP_SHAREDMEM_BASE) \
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$(OPT_PSP_SHAREDMEM_SIZE) \
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--combo-capable \
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$(OPT_TOKEN_UNLOCK) \
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--flashsize $(CONFIG_ROM_SIZE)
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# Copy prebuild APCBs if they exist
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$(obj)/APCB_%.bin: $(MAINBOARD_BLOBS_DIR)/APCB_%.bin
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cp $< $@
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@ -397,59 +450,8 @@ $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \
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rm -f $@
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@printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
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$(AMDFWTOOL) \
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$(OPT_AMD_PUBKEY_FILE) \
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$(OPT_PSPBTLDR_FILE) \
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$(OPT_PSPSCUREOS_FILE) \
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$(OPT_PSP_SEC_DBG_KEY_FILE) \
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$(OPT_SMUFW1_SUB2_FILE) \
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$(OPT_SMUFW2_SUB2_FILE) \
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$(OPT_SMUFW1_SUB1_FILE) \
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$(OPT_SMUFW2_SUB1_FILE) \
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$(OPT_PSP_APCB_FILES) \
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$(OPT_APOB_ADDR) \
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--apob-nv-size $(shell printf "0x%x" \
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$(shell cat $(obj)/fmap.fmd | $(_GET_APOBNV_SIZE))) \
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--apob-nv-base $(shell printf "0x%x" $(call int-add, \
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$(shell cat $(obj)/fmap.fmd | $(_GET_FLASH_BASE)) \
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$(shell cat $(obj)/fmap.fmd | $(_GET_BIOS_REG_BASE)) \
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$(shell cat $(obj)/fmap.fmd | $(_GET_APOBNV_BASE)))) \
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$(OPT_PSP_BIOSBIN_FILE) \
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$(OPT_PSP_BIOSBIN_DEST) \
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$(OPT_PSP_BIOSBIN_SIZE) \
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$(OPT_PSP_SOFTFUSE) \
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$(OPT_PSP_PMUI_FILE1) \
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$(OPT_PSP_PMUI_FILE2) \
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$(OPT_PSP_PMUI_FILE3) \
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$(OPT_PSP_PMUI_FILE4) \
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$(OPT_PSP_PMUD_FILE1) \
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$(OPT_PSP_PMUD_FILE2) \
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$(OPT_PSP_PMUD_FILE3) \
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$(OPT_PSP_PMUD_FILE4) \
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$(OPT_MP2CFG_FILE) \
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$(OPT_ABL0_FILE) \
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$(OPT_ABL1_FILE) \
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$(OPT_ABL2_FILE) \
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$(OPT_ABL3_FILE) \
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$(OPT_ABL4_FILE) \
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$(OPT_ABL5_FILE) \
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$(OPT_ABL6_FILE) \
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$(OPT_ABL7_FILE) \
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$(OPT_WHITELIST_FILE) \
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$(OPT_SECG1_FILE) \
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$(OPT_SECG2_FILE) \
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$(OPT_MP2FW1_FILE) \
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$(OPT_MP2FW2_FILE) \
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$(OPT_DRIVERS_FILE) \
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$(OPT_PSP_S0I3_FILE) \
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$(OPT_IKEK_FILE) \
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$(OPT_SEC_DEBUG_FILE) \
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--combo-capable \
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$(OPT_TOKEN_UNLOCK) \
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$(OPT_VERSTAGE_FILE) \
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$(OPT_PSP_SHAREDMEM_BASE) \
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$(OPT_PSP_SHAREDMEM_SIZE) \
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--flashsize $(CONFIG_ROM_SIZE) \
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--location $(shell printf "0x%x" $(PICASSO_FWM_POSITION)) \
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$(AMDFW_COMMON_ARGS) \
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--location $(shell printf "%#x" $(PICASSO_FWM_POSITION)) \
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--output $@
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$(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS)
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@ -458,11 +460,41 @@ $(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS)
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$(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \
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--maxsize $(PSP_BIOSBIN_SIZE)
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$(obj)/amdfw_a.rom: $(obj)/amdfw.rom
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rm -f $@
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@printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
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$(AMDFWTOOL) \
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$(AMDFW_COMMON_ARGS) \
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--location $(shell printf "%#x" $(CONFIG_PICASSO_FW_A_POSITION)) \
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--anywhere \
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--output $@
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$(obj)/amdfw_b.rom: $(obj)/amdfw.rom
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rm -f $@
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@printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
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$(AMDFWTOOL) \
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$(AMDFW_COMMON_ARGS) \
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--location $(shell printf "%#x" $(CONFIG_PICASSO_FW_B_POSITION)) \
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--anywhere \
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--output $@
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cbfs-files-y += apu/amdfw
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apu/amdfw-file := $(obj)/amdfw.rom
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apu/amdfw-position := $(PICASSO_FWM_POSITION)
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apu/amdfw-type := raw
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ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy)
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cbfs-files-y += apu/amdfw_a
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apu/amdfw_a-file := $(obj)/amdfw_a.rom
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apu/amdfw_a-position := $(call strip_quotes, $(CONFIG_PICASSO_FW_A_POSITION))
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apu/amdfw_a-type := raw
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cbfs-files-y += apu/amdfw_b
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apu/amdfw_b-file := $(obj)/amdfw_b.rom
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apu/amdfw_b-position := $(call strip_quotes, $(CONFIG_PICASSO_FW_B_POSITION))
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apu/amdfw_b-type := raw
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endif
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$(call strip_quotes,$(CONFIG_FSP_M_CBFS))-options := -b $(CONFIG_FSP_M_ADDR)
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cpu_microcode_bins += $(wildcard 3rdparty/amd_blobs/picasso/PSP/UcodePatch_*.bin)
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