intel/minnowmax: Determine board type from GPIOs
SSUS GPIO 5 reflects the Minnowboard Max SKU: --- GPIO 5 low is a 1GB board --- GPIO 5 high is a 2GB (or 4GB in the future) board. This allows us to determine the board type at runtime and configure the FSP appropriately. Change-Id: I9f75df5413d23d63280b601457ea9a1ff020d717 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7797 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins)
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@ -44,19 +44,7 @@ config LOCK_MANAGEMENT_ENGINE
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config MAINBOARD_PART_NUMBER
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string
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default "Minnow Max 2GB" if MINNOWMAX_2GB_SKU
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default "Minnow Max 1GB"
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choice
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prompt "Memory SKU to build"
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default MINNOWMAX_2GB_SKU
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config MINNOWMAX_1GB_SKU
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bool "1GB"
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config MINNOWMAX_2GB_SKU
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bool "2GB"
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endchoice
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default "Minnow Max"
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config MAX_CPUS
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int
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@ -179,7 +179,7 @@ static const struct soc_gpio_map gpssus_gpio_map[] = {
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GPIO_FUNC(0, PULL_UP, 20K), /* GPIO_S5[02] - SOC_GPIO_S5_2 */
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GPIO_FUNC6, /* GPIO_S5[03] - mPCIE_WAKEB */
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GPIO_NC, /* GPIO_S5[04] - No Connect */
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GPIO_INPUT, /* GPIO_S5[05] - BOM_OP1 */
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GPIO_INPUT, /* GPIO_S5[05] - BOM_OP1 - Memory: 0=1GB 1=2GB or 4GB*/
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GPIO_INPUT, /* GPIO_S5[06] - BOM_OP2 */
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GPIO_INPUT, /* GPIO_S5[07] - BOM_OP3 */
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GPIO_OUT_HIGH, /* GPIO_S5[08] - SOC_USB_HOST_EN0 */
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@ -23,6 +23,7 @@
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#include <drivers/intel/fsp/fsp_util.h>
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#include <pc80/mc146818rtc.h>
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#include <console/console.h>
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#include <baytrail/gpio.h>
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#include "chip.h"
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/**
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@ -57,17 +58,23 @@ void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer)
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{
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UPD_DATA_REGION *UpdData = FspRtBuffer->Common.UpdDataRgnPtr;
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u8 use_xhci = UpdData->PcdEnableXhci;
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u8 gpio5 = 0;
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/*
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* Minnow Max Board : 1GB SKU uses 2Gb density memory
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* 2GB SKU uses 4Gb densiry memory
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* Minnow Max Board
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* Read SSUS gpio 5 to determine memory type
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* 0 : 1GB SKU uses 2Gb density memory
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* 1 : 2GB SKU uses 4Gb density memory
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*
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* devicetree.cb assume 1GB SKU board
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*/
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if (CONFIG_MINNOWMAX_2GB_SKU)
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* devicetree.cb assumes 1GB SKU board
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*/
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configure_ssus_gpio(5, PAD_FUNC0 | PAD_PULL_DISABLE, PAD_VAL_INPUT);
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gpio5 = read_ssus_gpio(5);
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if (gpio5)
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UpdData->PcdMemoryParameters.DIMMDensity
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+= (DIMM_DENSITY_4G_BIT - DIMM_DENSITY_2G_BIT);
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printk(BIOS_NOTICE, "%s GB Minnowboard Max detected.\n",
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gpio5 ? "2 / 4" : "1" );
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/* Update XHCI UPD value if required */
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get_option(&use_xhci, "use_xhci_over_ehci");
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if ((use_xhci < 2) && (use_xhci != UpdData->PcdEnableXhci)) {
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