mainboard/google/fizz: Enable separate MRC cache for recovery mode
Enable separate MRC cache for recovery mode. This requires change in flash layout to accomodate another region for RECOVERY_MRC_CACHE. BUG=b:69473883 TEST=Verified following scenarios: 1. Boot into recovery does not destroy normal mode MRC cache. 2. Once recovery MRC cache is populated, all future boots in recovery mode re-use data from the cache. 3. Forcing recovery mode to retrain memory causes normal mode to retrain memory as well. Change-Id: Icdfac3698507d89d98a51cfc3d756a56d2a2d648 Signed-off-by: Shelley Chen <shchen@chromium.org> Reviewed-on: https://review.coreboot.org/22518 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -26,6 +26,8 @@ config VBOOT
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select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
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select VBOOT_EC_EFS
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select VBOOT_PHYSICAL_REC_SWITCH
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select HAS_RECOVERY_MRC_CACHE
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select MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN
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config DRIVER_TPM_I2C_BUS
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depends on FIZZ_USE_I2C_TPM
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@ -4,24 +4,29 @@ FLASH@0xff000000 0x1000000 {
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SI_ME@0x1000 0x1ff000
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}
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SI_BIOS@0x200000 0xe00000 {
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RW_SECTION_A@0x0 0x3f0000 {
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RW_SECTION_A@0x0 0x3e8000 {
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VBLOCK_A@0x0 0x10000
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FW_MAIN_A(CBFS)@0x10000 0x3dffc0
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RW_FWID_A@0x3effc0 0x40
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FW_MAIN_A(CBFS)@0x10000 0x3d7fc0
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RW_FWID_A@0x3e7fc0 0x40
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}
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RW_SECTION_B@0x3f0000 0x3f0000 {
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RW_SECTION_B@0x3e8000 0x3e8000 {
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VBLOCK_B@0x0 0x10000
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FW_MAIN_B(CBFS)@0x10000 0x3dffc0
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RW_FWID_B@0x3effc0 0x40
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FW_MAIN_B(CBFS)@0x10000 0x3d7fc0
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RW_FWID_B@0x3e7fc0 0x40
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}
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RW_MRC_CACHE@0x7e0000 0x10000
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RW_ELOG@0x7f0000 0x4000
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RW_SHARED@0x7f4000 0x4000 {
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SHARED_DATA@0x0 0x2000
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VBLOCK_DEV@0x2000 0x2000
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RW_MISC@0x7d0000 0x30000 {
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UNIFIED_MRC_CACHE@0x0 0x20000 {
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RECOVERY_MRC_CACHE@0x0 0x10000
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RW_MRC_CACHE@0x10000 0x10000
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}
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RW_ELOG@0x20000 0x4000
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RW_SHARED@0x24000 0x4000 {
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SHARED_DATA@0x0 0x2000
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VBLOCK_DEV@0x2000 0x2000
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}
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RW_VPD@0x28000 0x2000
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RW_NVRAM@0x2a000 0x6000
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}
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RW_VPD@0x7f8000 0x2000
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RW_NVRAM@0x7fa000 0x6000
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RW_LEGACY(CBFS)@0x800000 0x200000
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WP_RO@0xa00000 0x400000 {
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RO_VPD@0x0 0x4000
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