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Set up PIRQs in mainboard Config.lb for IP1000 and RM4100 instead of using the ones in i82801xx_lpc.c. 

Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Myles Watson <mylesgw@gmail.com>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Joseph Smith 2009-05-08 00:24:24 +00:00 committed by Joseph Smith
parent 06025df741
commit 9b04724a0a
2 changed files with 18 additions and 0 deletions
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9
src/mainboard/rca/rm4100/Config.lb
View File

@ -80,6 +80,15 @@ chip northbridge/intel/i82830 # Northbridge
register "rom_address" = "0xfff00000" register "rom_address" = "0xfff00000"
end end
chip southbridge/intel/i82801xx # Southbridge chip southbridge/intel/i82801xx # Southbridge
register "pirqa_routing" = "0x07"
register "pirqb_routing" = "0x09"
register "pirqc_routing" = "0x0a"
register "pirqd_routing" = "0x09"
register "pirqe_routing" = "0x05"
register "pirqf_routing" = "0x80"
register "pirqg_routing" = "0x80"
register "pirqh_routing" = "0x0b"
device pci 1d.0 on end # USB UHCI Controller #1 device pci 1d.0 on end # USB UHCI Controller #1
device pci 1d.1 on end # USB UHCI Controller #2 device pci 1d.1 on end # USB UHCI Controller #2
device pci 1d.2 on end # USB UHCI Controller #3 device pci 1d.2 on end # USB UHCI Controller #3

9
src/mainboard/thomson/ip1000/Config.lb
View File

@ -80,6 +80,15 @@ chip northbridge/intel/i82830 # Northbridge
register "rom_address" = "0xfff00000" register "rom_address" = "0xfff00000"
end end
chip southbridge/intel/i82801xx # Southbridge chip southbridge/intel/i82801xx # Southbridge
register "pirqa_routing" = "0x07"
register "pirqb_routing" = "0x09"
register "pirqc_routing" = "0x0a"
register "pirqd_routing" = "0x09"
register "pirqe_routing" = "0x05"
register "pirqf_routing" = "0x80"
register "pirqg_routing" = "0x80"
register "pirqh_routing" = "0x0b"
device pci 1d.0 on end # USB UHCI Controller #1 device pci 1d.0 on end # USB UHCI Controller #1
device pci 1d.1 on end # USB UHCI Controller #2 device pci 1d.1 on end # USB UHCI Controller #2
device pci 1d.2 on end # USB UHCI Controller #3 device pci 1d.2 on end # USB UHCI Controller #3