Set up PIRQs in mainboard Config.lb for IP1000 and RM4100 instead of using the ones in i82801xx_lpc.c.
Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -80,6 +80,15 @@ chip northbridge/intel/i82830 # Northbridge
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register "rom_address" = "0xfff00000"
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end
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chip southbridge/intel/i82801xx # Southbridge
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register "pirqa_routing" = "0x07"
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register "pirqb_routing" = "0x09"
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register "pirqc_routing" = "0x0a"
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register "pirqd_routing" = "0x09"
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register "pirqe_routing" = "0x05"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqh_routing" = "0x0b"
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device pci 1d.0 on end # USB UHCI Controller #1
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device pci 1d.1 on end # USB UHCI Controller #2
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device pci 1d.2 on end # USB UHCI Controller #3
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@ -80,6 +80,15 @@ chip northbridge/intel/i82830 # Northbridge
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register "rom_address" = "0xfff00000"
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end
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chip southbridge/intel/i82801xx # Southbridge
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register "pirqa_routing" = "0x07"
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register "pirqb_routing" = "0x09"
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register "pirqc_routing" = "0x0a"
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register "pirqd_routing" = "0x09"
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register "pirqe_routing" = "0x05"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqh_routing" = "0x0b"
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device pci 1d.0 on end # USB UHCI Controller #1
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device pci 1d.1 on end # USB UHCI Controller #2
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device pci 1d.2 on end # USB UHCI Controller #3
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