soc/samsung/exynos5250/clock.c: Trivial whitespace fixes
Reduce difference with exynos5420/clock.c by fixing some whitespace and an include directive. Change-Id: Ifbdd61c8300f3988f5f729fe7d6124ac8a9b7821 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7926 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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@ -19,11 +19,11 @@
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#include <assert.h>
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#include <stdlib.h>
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#include <timer.h>
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#include <arch/io.h>
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#include <console/console.h>
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#include "clk.h"
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#include "periph.h"
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#include "timer.h"
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/* input clock of PLL: SMDK5250 has 24MHz input clock */
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#define CONFIG_SYS_CLK_FREQ 24000000
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@ -635,12 +635,10 @@ int clock_epll_set_rate(unsigned long rate)
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end = current;
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mono_time_add_msecs(&end, TIMEOUT_EPLL_LOCK);
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while (!(readl(&exynos_clock->epll_con0) &
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while (!(readl(&exynos_clock->epll_con0) &
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(0x1 << EXYNOS5_EPLLCON0_LOCKED_SHIFT))) {
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if (mono_time_after(¤t, &end)) {
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printk(BIOS_DEBUG,
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"%s: Timeout waiting for EPLL lock\n",
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__func__);
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printk(BIOS_DEBUG, "%s: Timeout waiting for EPLL lock\n", __func__);
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return -1;
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}
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timer_monotonic_get(¤t);
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