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soc/samsung/exynos5250/clock.c: Trivial whitespace fixes 

Reduce difference with exynos5420/clock.c by fixing some whitespace
and an include directive.

Change-Id: Ifbdd61c8300f3988f5f729fe7d6124ac8a9b7821
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7926
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Edward O'Callaghan 2014-12-26 12:36:47 +11:00
parent f679cfe429
commit 9b152b2a55
1 changed files with 3 additions and 5 deletions
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8
src/soc/samsung/exynos5250/clock.c
View File

@ -19,11 +19,11 @@
#include <assert.h> #include <assert.h>
#include <stdlib.h> #include <stdlib.h>
#include <timer.h>
#include <arch/io.h> #include <arch/io.h>
#include <console/console.h> #include <console/console.h>
#include "clk.h" #include "clk.h"
#include "periph.h" #include "periph.h"
#include "timer.h"
/* input clock of PLL: SMDK5250 has 24MHz input clock */ /* input clock of PLL: SMDK5250 has 24MHz input clock */
#define CONFIG_SYS_CLK_FREQ 24000000 #define CONFIG_SYS_CLK_FREQ 24000000
@ -635,12 +635,10 @@ int clock_epll_set_rate(unsigned long rate)
end = current; end = current;
mono_time_add_msecs(&end, TIMEOUT_EPLL_LOCK); mono_time_add_msecs(&end, TIMEOUT_EPLL_LOCK);
while (!(readl(&exynos_clock->epll_con0) & while (!(readl(&exynos_clock->epll_con0) &
(0x1 << EXYNOS5_EPLLCON0_LOCKED_SHIFT))) { (0x1 << EXYNOS5_EPLLCON0_LOCKED_SHIFT))) {
if (mono_time_after(&current, &end)) { if (mono_time_after(&current, &end)) {
printk(BIOS_DEBUG, printk(BIOS_DEBUG, "%s: Timeout waiting for EPLL lock\n", __func__);
"%s: Timeout waiting for EPLL lock\n",
__func__);
return -1; return -1;
} }
timer_monotonic_get(&current); timer_monotonic_get(&current);