mb/google/nissa/var/nivviks: Enable ISH when UFS is present

In order to enable the UFS controller (PCI device 12.7), the PCI
specification says that the device at function 0 in the same slot must
also be enabled, which is the ISH. Therefore, enable ISH when UFS is
present.

For more context on why this is necessary, see CB:62662 which enabled
UFS and ISH for adlrvp_n.

BUG=b:234136500
TEST=Build test. Will test that UFS works once we have hardware.

Signed-off-by: Reka Norman <rekanorman@chromium.org>
Change-Id: Ib60d44322cfbd8f82c33ecac7598881dfb1d0c3c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64845
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Daniil Lunev <dlunev@chromium.org>
This commit is contained in:
Reka Norman 2022-06-01 09:02:39 +10:00 committed by Paul Fagerburg
parent 272eac4929
commit 9b1fc309ed
1 changed files with 3 additions and 0 deletions

View File

@ -343,6 +343,9 @@ chip soc/intel/alderlake
device ref emmc on device ref emmc on
probe STORAGE STORAGE_EMMC probe STORAGE STORAGE_EMMC
end end
device ref ish on
probe STORAGE STORAGE_UFS
end
device ref ufs on device ref ufs on
probe STORAGE STORAGE_UFS probe STORAGE STORAGE_UFS
end end