From 9b423a77d171a7f18ef0eb6bb98daf56eeb1da62 Mon Sep 17 00:00:00 2001 From: Jimmy Huang Date: Tue, 16 Jun 2015 12:18:50 +0800 Subject: [PATCH] arch/arm64: add DMA_COHERENT region macros to memlayout BRANCH=none BUG=none TEST=build pass Change-Id: Ia997ce97ad42234ab020af7bd007d57d7191ee86 Signed-off-by: Patrick Georgi Original-Commit-Id: 604ac738e33fdfbaf093989ea13162c8506b9360 Original-Change-Id: I636a1a38d0f5af97926d4446f3edb91a359cce4c Original-Signed-off-by: Jimmy Huang Original-Reviewed-on: https://chromium-review.googlesource.com/292551 Original-Commit-Ready: Yidi Lin Original-Tested-by: Yidi Lin Original-Reviewed-by: Julius Werner Reviewed-on: https://review.coreboot.org/12584 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/arch/arm64/include/arch/memlayout.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/arch/arm64/include/arch/memlayout.h b/src/arch/arm64/include/arch/memlayout.h index 0bd0835aa8..ac09934019 100644 --- a/src/arch/arm64/include/arch/memlayout.h +++ b/src/arch/arm64/include/arch/memlayout.h @@ -22,6 +22,11 @@ REGION(ttb, addr, size, 4K) \ _ = ASSERT(size % 4K == 0, "TTB size must be divisible by 4K!"); +#define DMA_COHERENT(addr, size) \ + REGION(dma_coherent, addr, size, 4K) \ + _ = ASSERT(size % 4K == 0, \ + "DMA buffer should be multiple of smallest page size (4K)!"); + /* ARM64 stacks need 16-byte alignment. */ #define STACK(addr, size) \ REGION(stack, addr, size, 16) \