src/superio: Use 'PNP_IDX_*' macros instead of magic numbers

Change-Id: I2f8d6d9e8b6e84bb6c2b4e73b0fbeca476130d05
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44833
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Elyes HAOUAS 2020-08-26 18:36:13 +02:00 committed by Felix Held
parent aa03f30e6e
commit 9b54dfa1d0
5 changed files with 15 additions and 10 deletions

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@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <arch/io.h>
#include <device/pnp_def.h>
#include <device/pnp_ops.h>
#include "it8772f.h"
@ -27,7 +28,7 @@ void it8772f_ac_resume_southbridge(pnp_devfn_t dev)
{
it8772f_enter_conf(dev);
pnp_write_config(dev, IT8772F_CONFIG_REG_LDN, IT8772F_EC);
pnp_write_config(dev, 0xf4, 0x60);
pnp_write_config(dev, PNP_IDX_MSC4, 0x60);
it8772f_exit_conf(dev);
}

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@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <arch/io.h>
#include <device/pnp_def.h>
#include <device/pnp_ops.h>
#include <device/pnp.h>
#include <stdint.h>
@ -27,7 +28,7 @@ void xbus_cfg(pnp_devfn_t dev)
/* Select proper BIOS size (4MB). */
pnp_write_config(dev, PC87417_XMEMCNF2,
(pnp_read_config(dev, PC87417_XMEMCNF2)) | 0x04);
xbus_index = pnp_read_iobase(dev, 0x60);
xbus_index = pnp_read_iobase(dev, PNP_IDX_IO0);
/* Enable writes to devices attached to XCS0 (XBUS Chip Select 0). */
for (i = 0; i <= 0xf; i++)

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@ -7,6 +7,7 @@
#include <device/pnp_ops.h>
#include <console/console.h>
#include <device/pnp.h>
#include <device/pnp_def.h>
#include "pilot.h"
/*
@ -24,10 +25,10 @@ void pilot_early_init(pnp_devfn_t dev)
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(PNP_DEV(port, 0x3));
pnp_set_enable(dev, 0);
pnp_set_iobase(dev, 0x60, 0x0b00);
pnp_set_iobase(dev, 0x62, 0x0b80);
pnp_set_iobase(dev, 0x64, 0x0b84);
pnp_set_iobase(dev, 0x66, 0x0b86);
pnp_set_iobase(dev, PNP_IDX_IO0, 0x0b00);
pnp_set_iobase(dev, PNP_IDX_IO1, 0x0b80);
pnp_set_iobase(dev, PNP_IDX_IO2, 0x0b84);
pnp_set_iobase(dev, PNP_IDX_IO3, 0x0b86);
pnp_set_enable(dev, 1);
pnp_exit_ext_func_mode(dev);

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@ -5,6 +5,7 @@
#include <arch/io.h>
#include <device/pnp_ops.h>
#include <device/pnp.h>
#include <device/pnp_def.h>
#include <stdint.h>
#include "kbc1100.h"
@ -46,8 +47,8 @@ void kbc1100_early_init(u16 port)
pnp_set_enable(dev, 0);
pnp_set_iobase(dev, PNP_IDX_IO0, 0x60);
pnp_set_iobase(dev, PNP_IDX_IO1, 0x64);
pnp_set_irq(dev, 0x70, 1); /* IRQ 1 */
pnp_set_irq(dev, 0x72, 12); /* IRQ 12 */
pnp_set_irq(dev, PNP_IDX_IRQ0, 1); /* IRQ 1 */
pnp_set_irq(dev, PNP_IDX_IRQ1, 12); /* IRQ 12 */
pnp_set_enable(dev, 1);
/* Enable EC Channel 0 */

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@ -2,6 +2,7 @@
#include <device/device.h>
#include <device/pnp.h>
#include <device/pnp_def.h>
#include <superio/conf_mode.h>
#include <stdint.h>
#include <pc80/keyboard.h>
@ -29,10 +30,10 @@ static void set_uart_clock_source(struct device *dev, u8 uart_clock)
pnp_enter_conf_mode(dev);
pnp_set_logical_device(dev);
value = pnp_read_config(dev, 0xf0);
value = pnp_read_config(dev, PNP_IDX_MSC0);
value &= ~0x03;
value |= (uart_clock & 0x03);
pnp_write_config(dev, 0xf0, value);
pnp_write_config(dev, PNP_IDX_MSC0, value);
pnp_exit_conf_mode(dev);
}