soc/amd/common/block/include/gpio_defs.h: Fix documentation
Fixing documentation of PAD_INT macro and replacing spaces with a tab to match the rest of the documentation. Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I72a2578ce21dd10b3beb65c706440c3379f216d6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70281 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
parent
7543627f1b
commit
9b592f70d6
|
@ -160,7 +160,7 @@
|
|||
* pin the pin to be programmed
|
||||
* pull pull up, pull down or no pull
|
||||
* trigger LEVEL_LOW, LEVEL_HIGH, EDGE_LOW, EDGE_HIGH, BOTH_EDGES
|
||||
* action STATUS, DELIVER, STATUS_DELIVER
|
||||
* action STATUS, DELIVERY, STATUS_DELIVERY
|
||||
* PAD_SCI The pin is a SCI source
|
||||
* pin the pin to be programmed
|
||||
* pull pull up, pull down or no pull
|
||||
|
@ -168,7 +168,7 @@
|
|||
* PAD_SMI The pin is a SMI source
|
||||
* pin the pin to be programmed
|
||||
* pull pull up, pull down or no pull
|
||||
* event trigger LEVEL_LOW, LEVEL_HIGH
|
||||
* event trigger LEVEL_LOW, LEVEL_HIGH
|
||||
* PAD_NF_SCI Define native alternate function and confiure SCI source
|
||||
* pin the pin to be programmed
|
||||
* function the native function
|
||||
|
|
Loading…
Reference in New Issue